[PATCHv2 5/5] board: ge: bx50v3: cleanup phy config

[sbabic at denx.de]

> The current PHY rework does the following things:
> 1. Configure 125MHz clock
> 2. Setup the TX clock delay (RX is enabled by default),
> 3. Setup reserved bits to avoid voltage peak
> The clock delays are nowadays already configured by the
> PHY driver (in ar803x_delay_config). The code for that
> can simply be dropped. The clock speed can also be
> configured by the PHY driver by adding the device tree
> property "qca,clk-out-frequency".
> What is left is setting up the undocumented reserved bits
> to avoid the voltage peak problem. I slightly improved its
> documentation while updating the board's PHY rework code.
> Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================