[PULL] u-boot-socfpga/master
Marek Vasut
marex at denx.de
Sun Feb 2 18:18:53 CET 2020
The following changes since commit 80e99adbe47d1c8590f9b971ac52257fdc51a5ec:
Merge tag 'uniphier-v2020.04-2' of
https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier (2020-01-31
13:26:28 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-socfpga.git master
for you to fetch changes up to 56c24875d92adcf214d97f5798e11c1b7b5e27fa:
ddr: altera: Add DDR2 support to Gen5 driver (2020-02-02 18:18:05 +0100)
----------------------------------------------------------------
Ley Foon Tan (1):
reset: socfpga: Poll for reset status after deassert reset
Marek Vasut (5):
ARM: socfpga: Drop last use of socfpga_reset_manager
watchdog: designware: Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig
watchdog: designware: Convert to DM and DT probing
watchdog: designware: Optionally fetch clock and reset from DT
ddr: altera: Add DDR2 support to Gen5 driver
arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi | 4 ++
arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 4 ++
arch/arm/mach-socfpga/include/mach/sdram_gen5.h | 46
+++++++++++++++----
arch/arm/mach-socfpga/qts-filter.sh | 2 +-
arch/arm/mach-socfpga/spl_gen5.c | 5 +--
arch/arm/mach-socfpga/wrap_sdram_config.c | 64
+++++++++++++++++---------
configs/socfpga_stratix10_defconfig | 3 ++
configs/socfpga_vining_fpga_defconfig | 2 +
drivers/ddr/altera/sdram_gen5.c | 6 ++-
drivers/ddr/altera/sequencer.c | 193
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------
drivers/ddr/altera/sequencer.h | 1 +
drivers/reset/reset-socfpga.c | 6 ++-
drivers/watchdog/Kconfig | 7 +++
drivers/watchdog/designware_wdt.c | 150
+++++++++++++++++++++++++++++++++++++++++++++++++++----------
include/configs/socfpga_common.h | 3 --
include/configs/socfpga_soc64_common.h | 7 ++-
scripts/config_whitelist.txt | 1 -
17 files changed, 399 insertions(+), 105 deletions(-)
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