[PATCH v3 12/12] riscv: Add initial Sipeed Maix support
Sean Anderson
seanga2 at gmail.com
Tue Feb 4 15:26:16 CET 2020
On 2/4/20 6:38 AM, Bin Meng wrote:
> Hi Sean,
>
> On Mon, Feb 3, 2020 at 4:11 AM Sean Anderson <seanga2 at gmail.com> wrote:
>>
>> The Sipeed Maix series is a collection of boards built around the RISC-V
>> Kendryte K210 processor. This processor contains several peripherals to
>> accelerate neural network processing and other "ai" tasks. This includes a "KPU"
>> neural network processor, an audio processor supporting beamforming reception,
>> and a digital video port supporting capture and output at VGA resolution. Other
>> peripherals include 8M of sram (accessible with and without caching);
>> remappable pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA
>> controller; and I2C, I2S, and SPI controllers. Maix peripherals vary, but
>> include spi flash; on-board usb-serial bridges; ports for cameras, displays, and
>> sd cards; and ESP32 chips. Currently, only the Sipeed Maix Bit V2.0 (bitm) is
>> supported, but the boards are fairly similar.
>>
>> Documentation for Maix boards is located at <http://dl.sipeed.com/MAIX/HDK/>.
>> Documentation for the Kendryte K210 is located at
>> <https://kendryte.com/downloads/>. However, hardware details are rather lacking,
>> so most technical reference has been taken from the standalone sdk located at
>> <https://github.com/kendryte/kendryte-standalone-sdk>.
>>
>> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
>> ---
>> Changes for v3:
>> - Reorder to be last in the patch series
>> - Add documentation for the board
>> - Generate defconfig with "make savedefconfig"
>> - Update Kconfig to imply most features we need
>> - Update MAINTAINERS
>> Changes for v2:
>> - Select CONFIG_SYS_RISCV_NOCOUNTER
>> - Imply CONFIG_CLK_K210
>> - Remove spurious references to CONFIG_ARCH_K210
>> - Remove many configs from defconfig where the defaults were fine
>> - Add a few "not set" lines to suppress unneeded defaults
>> - Reduce pre-reloc malloc space, now that clocks initialization happens later
>>
>> arch/riscv/Kconfig | 4 +++
>> board/sipeed/maix/Kconfig | 51 ++++++++++++++++++++++++++++++
>> board/sipeed/maix/MAINTAINERS | 10 ++++++
>> board/sipeed/maix/Makefile | 5 +++
>> board/sipeed/maix/maix.c | 9 ++++++
>> configs/sipeed_maix_bitm_defconfig | 10 ++++++
>> doc/board/index.rst | 1 +
>> doc/board/kendryte/index.rst | 9 ++++++
>> doc/board/kendryte/k210.rst | 46 +++++++++++++++++++++++++++
>> include/configs/sipeed-maix.h | 19 +++++++++++
>> 10 files changed, 164 insertions(+)
>> create mode 100644 board/sipeed/maix/Kconfig
>> create mode 100644 board/sipeed/maix/MAINTAINERS
>> create mode 100644 board/sipeed/maix/Makefile
>> create mode 100644 board/sipeed/maix/maix.c
>> create mode 100644 configs/sipeed_maix_bitm_defconfig
>> create mode 100644 doc/board/kendryte/index.rst
>> create mode 100644 doc/board/kendryte/k210.rst
>> create mode 100644 include/configs/sipeed-maix.h
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index 87c40f6c4c..81ab35dd2d 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
>> config TARGET_SIFIVE_FU540
>> bool "Support SiFive FU540 Board"
>>
>> +config TARGET_SIPEED_MAIX
>> + bool "Support Sipeed Maix Board"
>> +
>> endchoice
>>
>> config SYS_ICACHE_OFF
>> @@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
>> source "board/emulation/qemu-riscv/Kconfig"
>> source "board/microchip/mpfs_icicle/Kconfig"
>> source "board/sifive/fu540/Kconfig"
>> +source "board/sipeed/maix/Kconfig"
>>
>> # platform-specific options below
>> source "arch/riscv/cpu/ax25/Kconfig"
>> diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
>> new file mode 100644
>> index 0000000000..b23d2448d9
>> --- /dev/null
>> +++ b/board/sipeed/maix/Kconfig
>> @@ -0,0 +1,51 @@
>> +# SPDX-License-Identifier: GPL-2.0+
>> +# Copyright (C) 2019 Sean Anderson <seanga2 at gmail.com>
>> +
>> +if TARGET_SIPEED_MAIX
>> +
>> +config SYS_BOARD
>> + default "maix"
>> +
>> +config SYS_VENDOR
>> + default "sipeed"
>> +
>> +config SYS_CPU
>> + default "generic"
>> +
>> +config SYS_CONFIG_NAME
>> + default "sipeed-maix"
>> +
>> +config SYS_TEXT_BASE
>> + default 0x80000000
>> +
>> +config DEFAULT_DEVICE_TREE
>> + default "k210-maix-bit"
>> +
>> +config NR_CPUS
>> + default 2
>> +
>> +config NR_DRAM_BANKS
>> + default 2
>> +
>> +config BOARD_SPECIFIC_OPTIONS
>> + def_bool y
>> + select GENERIC_RISCV
>> + select RISCV_PRIV_1_9_1
>> + imply DM_SERIAL
>> + imply SIFIVE_SERIAL
>> + imply SIFIVE_CLINT
>> + imply CLK_CCF
>> + imply CLK_COMPOSITE_CCF
>> + imply CLK_K210
>> + imply DM_RESET
>> + imply RESET_SYSCON
>> + imply SYSRESET
>> + imply SYSRESET_SYSCON
>> + imply SPI
>> + imply DESIGNWARE_SPI
>> + imply SPI_FLASH_GIGADEVICE
>> + imply MMC
>> + imply MMC_SPI
>> + imply MMC_BROKEN_CD
>> + imply CMD_MMC
>> +endif
>> diff --git a/board/sipeed/maix/MAINTAINERS b/board/sipeed/maix/MAINTAINERS
>> new file mode 100644
>> index 0000000000..43cf61fb64
>> --- /dev/null
>> +++ b/board/sipeed/maix/MAINTAINERS
>> @@ -0,0 +1,10 @@
>> +Sipeed Maix BOARD
>> +M: Sean Anderson <seanga2 at gmail.com>
>> +S: Maintained
>> +F: arch/riscv/dts/k210.dtsi
>> +F: arch/riscv/dts/k210-maix-bit.dts
>> +F: board/sipeed/maix/
>> +F: configs/sipeed_maix_defconfig
>> +F: drivers/clk/kendryte/
>> +F: include/configs/sipeed-maix.h
>> +F: include/dt-bindings/*/k210-sysctl.h
>> diff --git a/board/sipeed/maix/Makefile b/board/sipeed/maix/Makefile
>> new file mode 100644
>> index 0000000000..4acff5b31e
>> --- /dev/null
>> +++ b/board/sipeed/maix/Makefile
>> @@ -0,0 +1,5 @@
>> +# SPDX-License-Identifier: GPL-2.0+
>> +#
>> +# Copyright (c) 2019 Western Digital Corporation or its affiliates.
>> +
>> +obj-y += maix.o
>> diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c
>> new file mode 100644
>> index 0000000000..f8e773acf7
>> --- /dev/null
>> +++ b/board/sipeed/maix/maix.c
>> @@ -0,0 +1,9 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Sean Anderson <seanga2 at gmail.com>
>> + */
>> +
>> +int board_init(void)
>> +{
>> + return 0;
>> +}
>> diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig
>> new file mode 100644
>> index 0000000000..22d814ec7f
>> --- /dev/null
>> +++ b/configs/sipeed_maix_bitm_defconfig
>> @@ -0,0 +1,10 @@
>> +CONFIG_RISCV=y
>> +CONFIG_TARGET_SIPEED_MAIX=y
>> +CONFIG_ARCH_RV64I=y
>> +# CONFIG_LEGACY_IMAGE_FORMAT is not set
>> +# CONFIG_AUTOBOOT is not set
>> +# CONFIG_NET is not set
>> +# CONFIG_INPUT is not set
>> +# CONFIG_MTD is not set
>> +# CONFIG_DM_ETH is not set
>> +# CONFIG_EFI_LOADER is not set
>> diff --git a/doc/board/index.rst b/doc/board/index.rst
>> index 00e72f57cd..2bd740589b 100644
>> --- a/doc/board/index.rst
>> +++ b/doc/board/index.rst
>> @@ -13,6 +13,7 @@ Board-specific doc
>> freescale/index
>> google/index
>> intel/index
>> + kendryte/index
>
> We should use the board vendor name: sipeed/index>
That's what I thought, but everything else in this directory is
organized by CPU manufacturer. For example, it is
doc/board/sifive/fu450.rst, not hifive.rst. Hence the naming scheme
below.
>> renesas/index
>> sifive/index
>> xilinx/index
>> diff --git a/doc/board/kendryte/index.rst b/doc/board/kendryte/index.rst
>> new file mode 100644
>> index 0000000000..5cbecd5731
>> --- /dev/null
>> +++ b/doc/board/kendryte/index.rst
>> @@ -0,0 +1,9 @@
>> +.. SPDX-License-Identifier: GPL-2.0+
>> +
>> +Kendryte
>
> Sipeed
>
>> +========
>> +
>> +.. toctree::
>> + :maxdepth: 2
>> +
>> + k210
>
> and use the board name here: maix, or k210-maix-bit ?
>
>> diff --git a/doc/board/kendryte/k210.rst b/doc/board/kendryte/k210.rst
>> new file mode 100644
>> index 0000000000..14e0c22637
>> --- /dev/null
>> +++ b/doc/board/kendryte/k210.rst
>> @@ -0,0 +1,46 @@
>> +.. SPDX-License-Identifier: GPL-2.0+
>> +
>> +K210
>
> k210-maix-bit ?
>
>> +====
>> +
>> +The Kendryte K210 processor is a 64-bit RISC-V CPU. This processor contains
>> +several peripherals to accelerate neural network processing and other "ai"
>> +tasks. This includes a "KPU" neural network processor, an audio processor
>> +supporting beamforming reception, and a digital video port supporting capture
>> +and output at VGA resolution. Other peripherals include 8M of sram (accessible
>> +with and without caching); remappable pins, including 40 GPIOs; AES, FFT, and
>> +SHA256 accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
>> +peripherals vary, but include spi flash; on-board usb-serial bridges; ports for
>> +cameras, displays, and sd cards; and ESP32 chips. Currently, only the Sipeed
>> +Maix Bit V2.0 (bitm) is supported, but the boards are fairly similar.
>> +
>> +Documentation for Maix boards is located at <http://dl.sipeed.com/MAIX/HDK/>.
>> +Documentation for the Kendryte K210 is located at
>> +<https://kendryte.com/downloads/>. However, hardware details are rather lacking,
>> +so most technical reference has been taken from the standalone sdk located at
>> +<https://github.com/kendryte/kendryte-standalone-sdk>.
>> +
>> +Build and boot steps
>> +--------------------
>> +
>> +To build u-boot, run
>> +
>> +make sipeed_maix_bit_defconfig
>> +make CROSS_COMPILE=<your cross compile prefix>
>> +
>> +To flash u-boot to a maix bit, run
>> +kflash -tp /dev/<your tty here> -B bit_mic u-boot-dtb.bin
>> +
>> +Boot output should look like the following:
>> +
>> +U-Boot 2020.01-00455-gad03fd83e1 (Jan 15 2020 - 17:10:24 -0500)
>> +
>> +DRAM: 8 MiB
>> +MMC: spi at 52000000:slot at 0: 0
>> +In: serial at 38000000
>> +Out: serial at 38000000
>> +Err: serial at 38000000
>> +=>
>> +
>> +Note that spi does not work! I will try to figure out how to make it work, but
>> +for now the only way to boot something is to transfer it into ram over serial.
>> diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h
>> new file mode 100644
>> index 0000000000..598f7dfdd0
>> --- /dev/null
>> +++ b/include/configs/sipeed-maix.h
>> @@ -0,0 +1,19 @@
>> +/* SPDX-License-Identifier: GPL-2.0+ */
>> +/*
>> + * Copyright (C) 2019 Sean Anderson <seanga2 at gmail.com>
>> + */
>> +
>> +#ifndef CONFIGS_SIPEED_MAIX_H
>> +#define CONFIGS_SIPEED_MAIX_H
>> +
>> +#include <linux/sizes.h>
>> +
>> +#define CONFIG_SYS_LOAD_ADDR 0x80000000
>> +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_LOAD_ADDR
>> +#define CONFIG_SYS_SDRAM_SIZE SZ_8M
>> +/* Start just below AI memory */
>> +#define CONFIG_SYS_INIT_SP_ADDR 0x805FFFFF
>> +#define CONFIG_SYS_MALLOC_LEN SZ_8K
>> +#define CONFIG_SYS_CACHELINE_SIZE 64
>> +
>> +#endif /* CONFIGS_SIPEED_MAIX_H */
>> --
>
> Regards,
> Bin
>
--Sean
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