[RESEND v8 6/8] dm: arm64: ls1043a: add i2c DM support

Biwen Li biwen.li at nxp.com
Wed Feb 5 15:02:16 CET 2020


This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1043A

Reviewed-by: Priyanka Jain <priyanka.jain at nxp.com>
Signed-off-by: Biwen Li <biwen.li at nxp.com>
---
Changes in RESEND v8:
	- fix build warning

Changes in v8:
	- none

Changes in v7:
	- none

Changes in v6:
	- correct dependencies

Changes in v5:
	- update subject

Changes in v4:
	- update copyright

Changes in v3:
	- none

Changes in v2:
	- merge some patches to one patch

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig     | 10 +-
 arch/arm/include/asm/gpio.h                   |  4 +-
 board/freescale/ls1043aqds/ls1043aqds.c       | 98 +++++++++++++++++--
 configs/ls1043aqds_defconfig                  |  2 +
 configs/ls1043aqds_lpuart_defconfig           |  2 +
 configs/ls1043aqds_nand_defconfig             |  2 +
 configs/ls1043aqds_nor_ddr3_defconfig         |  2 +
 configs/ls1043aqds_qspi_defconfig             |  2 +
 configs/ls1043aqds_sdcard_ifc_defconfig       |  2 +
 configs/ls1043aqds_sdcard_qspi_defconfig      |  2 +
 configs/ls1043aqds_tfa_SECURE_BOOT_defconfig  |  2 +
 configs/ls1043aqds_tfa_defconfig              |  2 +
 configs/ls1043ardb_SECURE_BOOT_defconfig      |  2 +
 configs/ls1043ardb_defconfig                  |  2 +
 configs/ls1043ardb_nand_SECURE_BOOT_defconfig |  2 +
 configs/ls1043ardb_nand_defconfig             |  2 +
 .../ls1043ardb_sdcard_SECURE_BOOT_defconfig   |  2 +
 configs/ls1043ardb_sdcard_defconfig           |  2 +
 configs/ls1043ardb_tfa_SECURE_BOOT_defconfig  |  2 +
 configs/ls1043ardb_tfa_defconfig              |  2 +
 include/configs/ls1043a_common.h              | 11 +++
 21 files changed, 144 insertions(+), 13 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 275c66d992..760053e401 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -74,11 +74,11 @@ config ARCH_LS1043A
 	select SYS_FSL_HAS_DDR4
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
-	select SYS_I2C_MXC
-	select SYS_I2C_MXC_I2C1
-	select SYS_I2C_MXC_I2C2
-	select SYS_I2C_MXC_I2C3
-	select SYS_I2C_MXC_I2C4
+	select SYS_I2C_MXC if !DM_I2C
+	select SYS_I2C_MXC_I2C1 if !DM_I2C
+	select SYS_I2C_MXC_I2C2 if !DM_I2C
+	select SYS_I2C_MXC_I2C3 if !DM_I2C
+	select SYS_I2C_MXC_I2C4 if !DM_I2C
 	imply CMD_PCI
 
 config ARCH_LS1046A
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 29dc498bd8..c480e712fe 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -3,8 +3,8 @@
 	!defined(CONFIG_ARCH_BCM6858) && !defined(CONFIG_ARCH_BCM63158) && \
 	!defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_LX2160A) && \
 	!defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_LS1028A) && \
-       	!defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A) && \
-	!defined(CONFIG_ARCH_ASPEED) && \
+	!defined(CONFIG_ARCH_LS1043A) && !defined(CONFIG_ARCH_LS2080A) && \
+	!defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) && \
 	!defined(CONFIG_ARCH_U8500)
 #include <asm/arch/gpio.h>
 #endif
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 8c96b962b7..2d4b18cdbc 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2015 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
  */
 
 #include <common.h>
@@ -271,11 +272,24 @@ unsigned long get_board_ddr_clk(void)
 	return 66666666;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
 	int ret;
 
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+	ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
 	if (ret) {
 		puts("PCA: failed to select proper channel\n");
 		return ret;
@@ -290,8 +304,10 @@ int dram_init(void)
 	 * When resuming from deep sleep, the I2C channel may not be
 	 * in the default channel. So, switch to the default channel
 	 * before accessing DDR SPD.
+	 *
+	 * PCA9547 mount on I2C1 bus
 	 */
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 	fsl_initdram();
 #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
 	defined(CONFIG_SPL_BUILD)
@@ -304,16 +320,83 @@ int dram_init(void)
 
 int i2c_multiplexer_select_vid_channel(u8 channel)
 {
-	return select_i2c_ch_pca9547(channel);
+	return select_i2c_ch_pca9547(channel, 0);
 }
 
 void board_retimer_init(void)
 {
 	u8 reg;
+	int bus_num = 0;
 
 	/* Retimer is connected to I2C1_CH7_CH5 */
-	select_i2c_ch_pca9547(I2C_MUX_CH7);
+	select_i2c_ch_pca9547(I2C_MUX_CH7, bus_num);
 	reg = I2C_MUX_CH5;
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_SEC,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return;
+	}
+	dm_i2c_write(dev, 0, &reg, 1);
+
+	/* Access to Control/Shared register */
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_RETIMER_ADDR,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return;
+	}
+
+	reg = 0x0;
+	dm_i2c_write(dev, 0xff, &reg, 1);
+
+	/* Read device revision and ID */
+	dm_i2c_read(dev, 1, &reg, 1);
+	debug("Retimer version id = 0x%x\n", reg);
+
+	/* Enable Broadcast. All writes target all channel register sets */
+	reg = 0x0c;
+	dm_i2c_write(dev, 0xff, &reg, 1);
+
+	/* Reset Channel Registers */
+	dm_i2c_read(dev, 0, &reg, 1);
+	reg |= 0x4;
+	dm_i2c_write(dev, 0, &reg, 1);
+
+	/* Enable override divider select and Enable Override Output Mux */
+	dm_i2c_read(dev, 9, &reg, 1);
+	reg |= 0x24;
+	dm_i2c_write(dev, 9, &reg, 1);
+
+	/* Select VCO Divider to full rate (000) */
+	dm_i2c_read(dev, 0x18, &reg, 1);
+	reg &= 0x8f;
+	dm_i2c_write(dev, 0x18, &reg, 1);
+
+	/* Selects active PFD MUX Input as Re-timed Data (001) */
+	dm_i2c_read(dev, 0x1e, &reg, 1);
+	reg &= 0x3f;
+	reg |= 0x20;
+	dm_i2c_write(dev, 0x1e, &reg, 1);
+
+	/* Set data rate as 10.3125 Gbps */
+	reg = 0x0;
+	dm_i2c_write(dev, 0x60, &reg, 1);
+	reg = 0xb2;
+	dm_i2c_write(dev, 0x61, &reg, 1);
+	reg = 0x90;
+	dm_i2c_write(dev, 0x62, &reg, 1);
+	reg = 0xb3;
+	dm_i2c_write(dev, 0x63, &reg, 1);
+	reg = 0xcd;
+	dm_i2c_write(dev, 0x64, &reg, 1);
+#else
 	i2c_write(I2C_MUX_PCA_ADDR_SEC, 0, 1, &reg, 1);
 
 	/* Access to Control/Shared register */
@@ -360,9 +443,10 @@ void board_retimer_init(void)
 	i2c_write(I2C_RETIMER_ADDR, 0x63, 1, &reg, 1);
 	reg = 0xcd;
 	i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);
+#endif
 
 	/* Return the default channel */
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, bus_num);
 }
 
 int board_early_init_f(void)
@@ -375,8 +459,10 @@ int board_early_init_f(void)
 	u8 uart;
 #endif
 
+#ifdef CONFIG_SYS_I2C
 #ifdef CONFIG_SYS_I2C_EARLY_INIT
 	i2c_early_init_f();
+#endif
 #endif
 	fsl_lsch2_early_init_f();
 
@@ -457,7 +543,7 @@ int board_init(void)
 	erratum_a010315();
 #endif
 
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 	board_retimer_init();
 
 #ifdef CONFIG_SYS_FSL_SERDES
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 2885552ef3..93b86af607 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -62,3 +62,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 9d9229ac03..f89c2ee3a4 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -64,3 +64,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index c45eaea02a..a169bfef8f 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -78,3 +78,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 8d28fe1baf..01d0af30b1 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -63,3 +63,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 86b2eb56b8..65eff7c40b 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -58,3 +58,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index bf3f0d0990..c5042a345d 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -79,3 +79,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 0449469b89..12706a48dc 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -72,3 +72,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index 4ba5a8dd95..bbd01eb290 100644
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -64,3 +64,5 @@ CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_CMD_SETEXPR=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index 24db72a39d..6e594ed07c 100644
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -71,3 +71,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 5e030e2586..153a62866f 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -55,3 +55,5 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 0676cbccdd..d1e534388b 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -55,3 +55,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 1f4c5705d5..252c7c8313 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -75,3 +75,5 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index e7fe2de309..de18aaa063 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -74,3 +74,5 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 6529c7334c..149b25ffe5 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -74,3 +74,5 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index 228262477c..b386fc668c 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -73,3 +73,5 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index 83bfca078b..017ec5ea7a 100644
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -57,3 +57,5 @@ CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
 CONFIG_CMD_SETEXPR=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index 4154075986..eaddbca79f 100644
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -59,3 +59,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index bf24d4036d..985f40412c 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2015 Freescale Semiconductor
+ * Copyright (C) 2019 NXP
  */
 
 #ifndef __LS1043A_COMMON_H
@@ -141,7 +142,17 @@
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+#define CONFIG_SYS_I2C_MXC_I2C4		/* enable I2C bus 4 */
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
+#endif
 
 /* PCIe */
 #ifndef SPL_NO_PCIE
-- 
2.17.1



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