[PATCH v3 00/20] Refactor the architecture parts of mt7628

[Mauro Condarelli]

FYI
I've been using this patchset for over a week without any adverse effect.
It allowed me to port to VoCore2 board.
Should I add a "Tested-by" flag?
If so: how should I do it?

Regards
Mauro Codarelli

On 2/10/20 6:20 PM, Daniel Schwierzeck wrote:
> Hi Weije,
>
> Am 21.01.20 um 09:17 schrieb Weijie Gao:
>> This patch series are divided into two parts:
>>
>> The main part is to rewrite the whole architecture code of mt7628:
>> * Lock parts of the d-cache for initial stack so the rest of the code can
>>   be reimplemented in C.
>> * Memory controller & DDR initialization have been fully written to support
>>   detecting DDR size automatically.
>> * DDR calibration has also been reimplemented with a clear logic.
>> * Implemented a new sysreset driver to take advantage of the reset
>>   controller so we can drop the use of syscon-based sysreset to reduce size.
>>
>> The second part is to add SPL support for mt7628:
>> * With SPL enabled we can build the ROM-bootable and RAM-bootable binary
>>   simultaneously, and we can drop RAM boot related configs and defconfig
>>   files.
>> * Generate compressed u-boot.bin image for SPL to reduce size of final
>>   combined binary.
>> * Enable DM support for SPL for a more flexible device probing.
>> * Add a demo board (mt7628_rfb) aims at router application.
>>
>> Changes since v2:
>> * Dropped a patch which removes unused parts of mt7628a.dtsi
>> * Move lzma decompression support to common spl_nor.c
>> * Move u-boot,dm-pre-reloc to u-boot-mt7628.dtsi
>>
> could you resend patches from 14/20 to 20/20? Patch 16/20 should get a
> test as requested by Simon. From the remaining generic patches I'd like
> to have some more acks before applying. Thanks.
>