[PATCH v3 00/20] Refactor the architecture parts of mt7628

Stefan sr at denx.de
Tue Feb 11 12:16:06 CET 2020 

Hi Mauro,

On 11.02.20 11:58, Mauro Condarelli wrote:
> Thanks Daniel.
> 
> On 2/10/20 10:28 PM, Daniel Schwierzeck wrote:
>> Hi Mauro,
>>
>> Am 10.02.20 um 21:20 schrieb Mauro Condarelli:
>>> FYI
>>> I've been using this patchset for over a week without any adverse effect.
>>> It allowed me to port to VoCore2 board.
>>> Should I add a "Tested-by" flag?
>>> If so: how should I do it?
>>>
>>> Regards
>>> Mauro Codarelli
>>>
>> sorry that I could respond to your questions earlier. I've pushed the
>> complete patch set from Weijie to:
>>
>> https://gitlab.denx.de/u-boot/custodians/u-boot-mips/commits/testing
> I tried to use this repo/branch, but something is wrong (or I goofed badly).

Just a quick reply: I tested u-boot-mips/testing today and it works just
fine on both LinkIt and the GARDENA board. So there is nothing wrong
with this repository AFAICT.

You might need to rebase your patch on top of this branch, as some files
might have changes in the meantime.

Thanks,
Stefan

>> Maybe this helps you with development. If you have a bootable patch set
>> (you can do MMC later) for your VoCore2 board, please submit a regular
>> patch series based on that branch so that we can review again.
> I *do* have a bootable patchset built on top of master + Nemirovsky
> "reconfigurable cpu clocks" + Weijie v3.
> Result is fully working, including net and mmc/SD.
> 
> This patchset applies cleanly to uboot-mips/testing and compile
> apparently without errors, but resulting u-boot.bin does not work.
> By "does not work" I mean it does not utter a single char on debug
> serial.
> 
> I tried to do a complete diff between my working tree and this
> non-working one and there are tons of differences, but I couldn't
> spot anything that might be relevant.
> 
> I am unsure on how to proceed; please advise.
>> ===8<----
> Many thanks
> Mauro Condarelli
> 
> 
> My complete patchset follows:
> This includes some project-specific settings I need to remove
> before actual submission, but I left them in because *this*
> is working for me.
> ==========================================
>  From f1828bcacbd3fc3bc8aa9243b302ab2b7a509d88 Mon Sep 17 00:00:00 2001
> From: Mauro Condarelli <mc5686 at mclink.it>
> Date: Tue, 17 Dec 2019 10:54:21 +0100
> Subject: [PATCH] Add support for SoM "VoCore2".
> 
> Small patch series to add support for VoCore/VoCore2 board.
> 
> VoCore is open hardware and runs OpenWrt/LEDE.
> It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
> It will help you to make a smart house, study embedded system
> or even make the tiniest router in the world.
> 
> Details about this SoM can be found at "https://vocore.io/v2.html".
> 
> Series-notes:
> This port is working for me and able to boot Linux v5.0.
> Standard subsystems are enabled (SPI NOR, MMC/SD and USB).
> Network is not currently enabled as my Vocore2 board networking
> relies essentially on WiFi (which works under Linux).
> END
> 
> Series-to: uboot
> Series-name: VoCore2
> Series-cc: danielschwierzeck
> Series-cc: stroese
> Series-cc: Weijie Gao <weijie.gao at mediatek.com>
> Series-version: 5
> 
> Series-changes: 2
> - Removed some dead code
> - Changed Author to my full name (no nick)
> - Removed unwanted fixup to .dts generation (not my call).
> - Fixed commit message
> - Fixed various variables/filenames to include Vendor name
> - Changed Vendor name (Vonger -> Vocore)
> 
> Series-changes: 3
> - based on top of Weijie Gao patchset:
>      "[v3,xx/20]Refactor the architecture parts of mt7628"
> 
> Series-changes: 4
> - Reverted some overzealous DTS cleaning.
> - Added support for bootcount
> 
> Series-changes: 5
> - Added network setup.
> - Move back environment to SPI NOR.
> - Changes to environment default settings.
> 
> Signed-off-by: Mauro Condarelli <mc5686 at mclink.it>
> ---
>   arch/mips/dts/Makefile               |   1 +
>   arch/mips/dts/mt7628a.dtsi           |   5 ++
>   arch/mips/dts/vocore_vocore2.dts     |  78 ++++++++++++++++++++
>   arch/mips/mach-mtmips/Kconfig        |   8 ++
>   board/vocore/vocore2/Kconfig         |  12 +++
>   board/vocore/vocore2/Makefile        |   3 +
>   board/vocore/vocore2/board.c         |  33 +++++++++
>   configs/vocore2_defconfig            | 105 +++++++++++++++++++++++++++
>   configs/vocore2_defconfig_ENV_IN_FAT | 104 ++++++++++++++++++++++++++
>   include/configs/vocore2.h            |  76 +++++++++++++++++++
>   10 files changed, 425 insertions(+)
>   create mode 100644 arch/mips/dts/vocore_vocore2.dts
>   create mode 100644 board/vocore/vocore2/Kconfig
>   create mode 100644 board/vocore/vocore2/Makefile
>   create mode 100644 board/vocore/vocore2/board.c
>   create mode 100644 configs/vocore2_defconfig
>   create mode 100644 configs/vocore2_defconfig_ENV_IN_FAT
>   create mode 100644 include/configs/vocore2.h
> 
> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
> index cbd0c8bc8b..f711e9fb59 100644
> --- a/arch/mips/dts/Makefile
> +++ b/arch/mips/dts/Makefile
> @@ -23,6 +23,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) +=
> netgear,dgnd3700v2.dtb
>   dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
>   dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
>   dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
> +dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
>   dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
>   dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
>   dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
> diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
> index 6baa63add3..192599c37f 100644
> --- a/arch/mips/dts/mt7628a.dtsi
> +++ b/arch/mips/dts/mt7628a.dtsi
> @@ -402,6 +402,11 @@
>           builtin-cd = <1>;
>           r_smpl = <1>;
>   
> +        bus-width = <4>;
> +        max-frequency = <48000000>;
> +        cap-sd-highspeed;
> +        cap-mmc-highspeed;
> +
>           clocks = <&clk48m>, <&clkctrl CLK_SDXC>;
>           clock-names = "source", "hclk";
>   
> diff --git a/arch/mips/dts/vocore_vocore2.dts
> b/arch/mips/dts/vocore_vocore2.dts
> new file mode 100644
> index 0000000000..1d611abb73
> --- /dev/null
> +++ b/arch/mips/dts/vocore_vocore2.dts
> @@ -0,0 +1,78 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Mauro Condarelli <mc5686 at mclink.it>
> + */
> +
> +/dts-v1/;
> +
> +#include "mt7628a.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> +    compatible = "vocore,vocore2", "ralink,mt7628a-soc";
> +    model = "VoCore2";
> +
> +    aliases {
> +        serial0 = &uart2;
> +        spi0 = &spi0;
> +    };
> +
> +    memory at 0 {
> +        device_type = "memory";
> +        reg = <0x0 0x08000000>;
> +    };
> +    leds {
> +        compatible = "gpio-leds";
> +
> +        power {
> +            label = "vocore:power";
> +            gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
> +            default-state = "off";
> +        };
> +    };
> +
> +    chosen {
> +        bootargs = "console=ttyS2,115200";
> +        stdout-path = &uart2;
> +    };
> +};
> +
> +&pinctrl {
> +    state_default: pin_state {
> +        p0led {
> +            groups = "p0led_a";
> +            function = "led";
> +        };
> +    };
> +};
> +
> +&uart2 {
> +    status = "okay";
> +};
> +
> +&spi0 {
> +    status = "okay";
> +    nor0: spi-flash at 0 {
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        compatible = "jedec,spi-nor";
> +        spi-max-frequency = <25000000>;
> +        reg = <0>;
> +    };
> +};
> +
> +&eth {
> +    status = "okay";
> +
> +    pinctrl-names = "default";
> +    pinctrl-0 = <&ephy_iot_mode>;
> +    mediatek,poll-link-phy = <0>;
> +};
> +
> +&mmc {
> +    status = "okay";
> +
> +    pinctrl-names = "default";
> +    pinctrl-0 = <&sd_iot_mode>;
> +    pinctrl-1 = <&sd_iot_mode>;
> +};
> diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
> index bcd635f438..489e466daf 100644
> --- a/arch/mips/mach-mtmips/Kconfig
> +++ b/arch/mips/mach-mtmips/Kconfig
> @@ -83,6 +83,13 @@ config BOARD_MT7628_RFB
>         SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host,
>         1 SDXC, 1 PCIe socket and JTAG pins.
>   
> +config BOARD_VOCORE2
> +    bool "VoCore2"
> +    depends on SOC_MT7628
> +    help
> +      VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
> +      and 16 MiB of flash (SPI).
> +
>   endchoice
>   
>   config SPL_UART2_SPIS_PINMUX
> @@ -96,5 +103,6 @@ config SPL_UART2_SPIS_PINMUX
>   source "board/gardena/smart-gateway-mt7688/Kconfig"
>   source "board/mediatek/mt7628/Kconfig"
>   source "board/seeed/linkit-smart-7688/Kconfig"
> +source "board/vocore/vocore2/Kconfig"
>   
>   endmenu
> diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig
> new file mode 100644
> index 0000000000..baeff31b69
> --- /dev/null
> +++ b/board/vocore/vocore2/Kconfig
> @@ -0,0 +1,12 @@
> +if BOARD_VOCORE2
> +
> +config SYS_BOARD
> +    default "vocore2"
> +
> +config SYS_VENDOR
> +    default "vocore"
> +
> +config SYS_CONFIG_NAME
> +    default "vocore2"
> +
> +endif
> diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile
> new file mode 100644
> index 0000000000..70cd7a8e56
> --- /dev/null
> +++ b/board/vocore/vocore2/Makefile
> @@ -0,0 +1,3 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +
> +obj-y += board.o
> diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c
> new file mode 100644
> index 0000000000..d387715d14
> --- /dev/null
> +++ b/board/vocore/vocore2/board.c
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Mauro Condarelli <mc5686 at mclink.it>
> + *
> + * Note: this is largely copied from:
> + *       board/seeed/linkit_smart_7688/board.c
> + *       Copyright (C) 2018 Stefan Roese <sr at denx.de>
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +
> +#define MT76XX_GPIO1_MODE   0x10000060
> +
> +void board_debug_uart_init(void)
> +{
> +    void __iomem *gpio_mode;
> +
> +    /* Select UART2 mode instead of GPIO mode (default) */
> +    gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
> +    clrbits_le32(gpio_mode, GENMASK(27, 26));
> +}
> +
> +int board_early_init_f(void)
> +{
> +    /*
> +     * The pin muxing of UART2 also needs to be done, if debug uart
> +     * is not enabled. So we need to call this function here as well.
> +     */
> +    board_debug_uart_init();
> +
> +    return 0;
> +}
> diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
> new file mode 100644
> index 0000000000..d243c0f79b
> --- /dev/null
> +++ b/configs/vocore2_defconfig
> @@ -0,0 +1,105 @@
> +CONFIG_MIPS=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_ENV_SIZE=0x1000
> +CONFIG_ENV_SECT_SIZE=0x1000
> +CONFIG_ENV_OFFSET=0x04e000
> +CONFIG_SPL_SERIAL_SUPPORT=y
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_SPL=y
> +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
> +CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
> +CONFIG_ARCH_MTMIPS=y
> +CONFIG_BOARD_VOCORE2=y
> +CONFIG_SPL_UART2_SPIS_PINMUX=y
> +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
> +CONFIG_MIPS_BOOT_FDT=y
> +CONFIG_ENV_VARS_UBOOT_CONFIG=y
> +CONFIG_SYS_BOOT_GET_CMDLINE=y
> +CONFIG_SYS_BOOT_GET_KBD=y
> +CONFIG_FIT=y
> +CONFIG_FIT_SIGNATURE=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
> +CONFIG_OF_STDOUT_VIA_ALIAS=y
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_LOGLEVEL=8
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_VERSION_VARIABLE=y
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_BOARD_EARLY_INIT_F=y
> +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
> +CONFIG_SPL_NOR_SUPPORT=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_CMD_LICENSE=y
> +# CONFIG_BOOTM_NETBSD is not set
> +# CONFIG_BOOTM_PLAN9 is not set
> +# CONFIG_BOOTM_RTEMS is not set
> +# CONFIG_BOOTM_VXWORKS is not set
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_CRC32 is not set
> +CONFIG_CMD_MEMINFO=y
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_GPT_RENAME=y
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> +CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_WDT=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_MII=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_BOOTCOUNT=y
> +CONFIG_CMD_TIME=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_CMD_MTDPARTS=y
> +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
> +CONFIG_MTDPARTS_DEFAULT="spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)"
> +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
> +CONFIG_ENV_IS_IN_SPI_FLASH=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_DM=y
> +# CONFIG_DM_DEVICE_REMOVE is not set
> +CONFIG_BOOTCOUNT_LIMIT=y
> +CONFIG_LED=y
> +CONFIG_LED_BLINK=y
> +CONFIG_LED_GPIO=y
> +CONFIG_MMC=y
> +CONFIG_DM_MMC=y
> +# CONFIG_MMC_HW_PARTITIONING is not set
> +CONFIG_MMC_MTK=y
> +CONFIG_MTD=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_MTD=y
> +CONFIG_MT7628_ETH=y
> +CONFIG_PHY=y
> +CONFIG_MT76X8_USB_PHY=y
> +# CONFIG_RAM_ROCKCHIP_DEBUG is not set
> +CONFIG_SPECIFY_CONSOLE_INDEX=y
> +CONFIG_CONS_INDEX=3
> +CONFIG_SPI=y
> +CONFIG_MT7621_SPI=y
> +CONFIG_USB=y
> +CONFIG_DM_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_WDT=y
> +CONFIG_WDT_MT7621=y
> +CONFIG_FS_EXT4=y
> +CONFIG_FAT_WRITE=y
> +CONFIG_LZMA=y
> +CONFIG_LZO=y
> diff --git a/configs/vocore2_defconfig_ENV_IN_FAT
> b/configs/vocore2_defconfig_ENV_IN_FAT
> new file mode 100644
> index 0000000000..02727859e4
> --- /dev/null
> +++ b/configs/vocore2_defconfig_ENV_IN_FAT
> @@ -0,0 +1,104 @@
> +CONFIG_MIPS=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_ENV_SIZE=0x1000
> +CONFIG_SPL_SERIAL_SUPPORT=y
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_SPL=y
> +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
> +CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
> +CONFIG_ARCH_MTMIPS=y
> +CONFIG_BOARD_VOCORE2=y
> +CONFIG_SPL_UART2_SPIS_PINMUX=y
> +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
> +CONFIG_MIPS_BOOT_FDT=y
> +CONFIG_ENV_VARS_UBOOT_CONFIG=y
> +CONFIG_SYS_BOOT_GET_CMDLINE=y
> +CONFIG_SYS_BOOT_GET_KBD=y
> +CONFIG_FIT=y
> +CONFIG_FIT_SIGNATURE=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
> +CONFIG_OF_STDOUT_VIA_ALIAS=y
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_LOGLEVEL=8
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_VERSION_VARIABLE=y
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_BOARD_EARLY_INIT_F=y
> +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
> +CONFIG_SPL_NOR_SUPPORT=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_CMD_LICENSE=y
> +# CONFIG_BOOTM_NETBSD is not set
> +# CONFIG_BOOTM_PLAN9 is not set
> +# CONFIG_BOOTM_RTEMS is not set
> +# CONFIG_BOOTM_VXWORKS is not set
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_CRC32 is not set
> +CONFIG_CMD_MEMINFO=y
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_GPT_RENAME=y
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> +CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_WDT=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_MII=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_BOOTCOUNT=y
> +CONFIG_CMD_TIME=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_CMD_MTDPARTS=y
> +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
> +CONFIG_MTDPARTS_DEFAULT="spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)"
> +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
> +CONFIG_ENV_IS_IN_FAT=y
> +CONFIG_ENV_FAT_INTERFACE="mmc"
> +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_DM=y
> +# CONFIG_DM_DEVICE_REMOVE is not set
> +CONFIG_BOOTCOUNT_LIMIT=y
> +CONFIG_LED=y
> +CONFIG_LED_BLINK=y
> +CONFIG_LED_GPIO=y
> +CONFIG_MMC=y
> +CONFIG_DM_MMC=y
> +# CONFIG_MMC_HW_PARTITIONING is not set
> +CONFIG_MMC_MTK=y
> +CONFIG_MTD=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_MTD=y
> +CONFIG_MT7628_ETH=y
> +CONFIG_PHY=y
> +CONFIG_MT76X8_USB_PHY=y
> +# CONFIG_RAM_ROCKCHIP_DEBUG is not set
> +CONFIG_SPECIFY_CONSOLE_INDEX=y
> +CONFIG_CONS_INDEX=3
> +CONFIG_SPI=y
> +CONFIG_MT7621_SPI=y
> +CONFIG_USB=y
> +CONFIG_DM_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_WDT=y
> +CONFIG_WDT_MT7621=y
> +CONFIG_FS_EXT4=y
> +CONFIG_LZMA=y
> +CONFIG_LZO=y
> diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
> new file mode 100644
> index 0000000000..0e8f063acf
> --- /dev/null
> +++ b/include/configs/vocore2.h
> @@ -0,0 +1,76 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2019 Mauro Condarelli <mc5686 at mclink.it>
> + */
> +
> +#ifndef __VOCORE2_CONFIG_H__
> +#define __VOCORE2_CONFIG_H__
> +
> +/* CPU */
> +#define CONFIG_SYS_MIPS_TIMER_FREQ    290000000
> +
> +/* RAM */
> +#define CONFIG_SYS_SDRAM_BASE        0x80000000
> +
> +#define CONFIG_SYS_LOAD_ADDR    CONFIG_SYS_SDRAM_BASE + 0x100000
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET    0x400000
> +
> +/* SPL */
> +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#endif
> +
> +#define CONFIG_SYS_UBOOT_START        CONFIG_SYS_TEXT_BASE
> +#define CONFIG_SPL_BSS_START_ADDR    0x80010000
> +#define CONFIG_SPL_BSS_MAX_SIZE        0x10000
> +#define CONFIG_SPL_MAX_SIZE        0x10000
> +
> +/* Dummy value */
> +#define CONFIG_SYS_UBOOT_BASE        0
> +
> +/* Serial SPL */
> +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
> +#define CONFIG_SYS_NS16550_MEM32
> +#define CONFIG_SYS_NS16550_CLK        40000000
> +#define CONFIG_SYS_NS16550_REG_SIZE    -4
> +#define CONFIG_SYS_NS16550_COM3        0xb0000e00
> +#define CONFIG_CONS_INDEX        3
> +
> +#endif
> +
> +/* UART */
> +#define CONFIG_SYS_BAUDRATE_TABLE    { 9600, 19200, 38400, 57600, 115200, \
> +                    230400, 460800, 921600 }
> +
> +/* RAM */
> +#define CONFIG_SYS_MEMTEST_START    0x80100000
> +#define CONFIG_SYS_MEMTEST_END        0x80400000
> +
> +/* Memory usage */
> +#define CONFIG_SYS_MAXARGS        64
> +#define CONFIG_SYS_MALLOC_LEN        (1024 * 1024)
> +#define CONFIG_SYS_BOOTPARAMS_LEN    (128 * 1024)
> +#define CONFIG_SYS_CBSIZE        512
> +
> +/* U-Boot */
> +#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
> +
> +/* Environment settings */
> +#define CONFIG_BOOTCOMMAND \
> +    "run fupdate; setenv bootargs ${default_bootargs}
> mtdparts=${mtdparts} root=/dev/mtdblock5 && bootm 1c050000"
> +//  "load mmc 0:1 85000000 recov.uImage && load mmc 0:1 86000000
> recov.squashfs && setenv bootargs ${default_bootargs}
> mtdparts=${mtdparts} rd_start=0x${fileaddr} rd_size=0x${filesize} &&
> bootm 85000000;"
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> +    "default_bootargs=earlyprintk rootwait console=ttyS2,115200\0"
>                                                                         
>          \
> +    "mtdids=nor0=spi0.0\0"
>                                                              \
> +
> "mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)\0"
>                                                                          \
> +    "fupdate=mmc rescan && load mmc 0:1 84000000 uboot.scr && fatrm mmc
> 0:1 uboot.scr && source 84000000 && echo Flash updated\0"
>                                      \
> +    "boot_a=echo \"Loading System A\";load mmc 0:5 85000000
> /boot/uImage; setenv bootargs \"${default_bootargs} mtdparts=${mtdparts}
> root=/dev/mmcblk0p5\"; bootm ${fileaddr}\0"                            \
> +    "boot_b=echo \"Loading System B\";load mmc 0:6 85000000
> /boot/uImage; setenv bootargs \"${default_bootargs} mtdparts=${mtdparts}
> root=/dev/mmcblk0p6\"; bootm ${fileaddr}\0"                            \
> +    "boot_r=echo \"Loading Recovery\"; setenv bootargs
> \"${default_bootargs} mtdparts=${mtdparts} root=/dev/mtdblock5\"; bootm
> bc050000\0"                                                \
> +    "remove_boot=if env exists BOOT_CURRENT; then setenv BOOT_CURRENT;
> saveenv; elif env exixts BOOT_A_GOOD; then setenv BOOT_A_GOOD; saveenv;
> elif env exists BOOT_B_GOOD; then setenv BOOT_B_GOOD; saveenv; fi\0"
>          \
> +    "boot_now=if test \"${BOOT_CURRENT}\" = A; then run boot_a; elif
> test \"${BOOT_CURRENT}\" = B; then run boot_b; elif env exists
> BOOT_A_GOOD; then run boot_a; elif env exists test BOOT_B_GOOD; then run
> boot_b; else run boot_r; fi\0"    \
> +    "do_boot=test ${bootcount} -gt 1 && run remove_boot; run boot_now"
> +    // "\0bootcmd=mmc rescan && run do_boot"
> +
> +#endif //__VOCORE2_CONFIG_H__
> 


Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de

More information about the U-Boot mailing list