[Uboot-stm32] [PATCH 4/9] ARM: dts: stm32mp1: move FDCAN to PLL4_R

[Patrice CHOTARD]

On 1/28/20 10:11 AM, Patrick Delaunay wrote:
> From: Antonio Borneo <antonio.borneo at st.com>
>
> LTDC modifies the clock frequency to adapt it to the display. Such
> frequency change is not detected by the FDCAN driver that instead
> cache the value at probe and pretend to use it later.
>
> Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R.
>
> Signed-off-by: Antonio Borneo <antonio.borneo at st.com>
> Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
> ---
>
>  arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 2 +-
>  arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi       | 2 +-
>  arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi       | 2 +-
>  arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi     | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> index 1104a70a65..d8a4617d90 100644
> --- a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> @@ -91,7 +91,7 @@
>  		CLK_UART6_HSI
>  		CLK_UART78_HSI
>  		CLK_SPDIF_PLL4P
> -		CLK_FDCAN_PLL4Q
> +		CLK_FDCAN_PLL4R
>  		CLK_SAI1_PLL3Q
>  		CLK_SAI2_PLL3Q
>  		CLK_SAI3_PLL3Q
> diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
> index 4045a6e731..a7a125c087 100644
> --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
> @@ -110,7 +110,7 @@
>  		CLK_UART6_HSI
>  		CLK_UART78_HSI
>  		CLK_SPDIF_PLL4P
> -		CLK_FDCAN_PLL4Q
> +		CLK_FDCAN_PLL4R
>  		CLK_SAI1_PLL3Q
>  		CLK_SAI2_PLL3Q
>  		CLK_SAI3_PLL3Q
> diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
> index b2ac49472a..32d95b84e7 100644
> --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
> @@ -107,7 +107,7 @@
>  		CLK_UART6_HSI
>  		CLK_UART78_HSI
>  		CLK_SPDIF_PLL4P
> -		CLK_FDCAN_PLL4Q
> +		CLK_FDCAN_PLL4R
>  		CLK_SAI1_PLL3Q
>  		CLK_SAI2_PLL3Q
>  		CLK_SAI3_PLL3Q
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> index 320912edd8..21aa4bfb86 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> @@ -142,7 +142,7 @@
>  		CLK_UART6_HSI
>  		CLK_UART78_HSI
>  		CLK_SPDIF_PLL4P
> -		CLK_FDCAN_PLL4Q
> +		CLK_FDCAN_PLL4R
>  		CLK_SAI1_PLL3Q
>  		CLK_SAI2_PLL3Q
>  		CLK_SAI3_PLL3Q

Reviewed-by: Patrice Chotard <patrice.chotard at st.com>

Thanks