[PATCH v3 0/5] usb: host: dwc2: use driver model for PHY and CLOCK

[Patrick DELAUNAY]

Hi,

> From: Patrick DELAUNAY <patrick.delaunay at st.com>
> Sent: mardi 12 novembre 2019 10:42
> To: u-boot at lists.denx.de
> Cc: ley.foon.tan at intel.com; b.galvani at gmail.com;
> simon.k.r.goldschmidt at gmail.com; Patrick DELAUNAY
> <patrick.delaunay at st.com>; Jagan Teki <jagan at amarulasolutions.com>; Jean-
> Jacques Hiblot <jjhiblot at ti.com>; Lokesh Vutla <lokeshvutla at ti.com>; Lukasz
> Majewski <lukma at denx.de>; Marek Vasut <marex at denx.de>; Michal Suchanek
> <msuchanek at suse.de>; Peng Fan <peng.fan at nxp.com>; Sekhar Nori
> <nsekhar at ti.com>; Simon Glass <sjg at chromium.org>; Sven Schwermer
> <sven at svenschwermer.de>; U-Boot STM32 <uboot-stm32 at st-md-
> mailman.stormreply.com>
> Subject: [PATCH v3 0/5] usb: host: dwc2: use driver model for PHY and CLOCK
> Importance: High
> 
> 
> In this serie I update the DWC2 host driver to use the device tree information and
> the associated PHY and CLOCK drivers when they are available.
> 
> CI-Travis build is OK for all target after V3:
> https://travis-ci.org/patrickdelaunay/u-boot/builds/609496187
> 
> In V2, I cause the warnings for some boards:
> drivers/usb/host/built-in.o: In function `dwc2_usb_remove':
> drivers/usb/host/dwc2.c:1441: undefined reference to `clk_disable_bulk'
> 
> I test this serie on stm32mp157c-ev1 board, with PHY and CLK support
> 
> The U-CLASS are provided by:
> - PHY by USBPHYC driver = ./drivers/phy/phy-stm32-usbphyc.c
> - CLOCK by RCC clock driver = drivers/clk/clk_stm32mp1.c
> - RESET by RCC reset driver = drivers/reset/stm32-reset.c
> 
> And I activate the configuration
> +CONFIG_USB_DWC2=y
> 
> PS: it is not the default configuration to avoid conflict with gadget
>     driver
> 
> To solve a binding issue, I also deactivate the gadget support:
> by default only one driver is bound to theusbotg_hs node with "snps,dwc2"
> compatible, and today it is the device one (the first in the driver list).
> 
> I also need to deactivate hnp-srp support with:
> 
> &usbotg_hs {
> 	/* need to disable ONLY for HOST support */
> 	hnp-srp-disable;
> };
> 
> WARNING: OTG with device or host support is not correctly handle by DWC2
>          driver (see example for dynamic OTG role in DWC3 driver).
> 
> The tests executed on the stm32mp157c-ev1 target:
> 
> STM32MP> usb start
> starting USB...
> Bus usb-otg at 49000000: USB DWC2
> Bus usbh-ehci at 5800d000: USB EHCI 1.00
> scanning bus usb-otg at 49000000 for devices... 2 USB Device(s) found scanning
> bus usbh-ehci at 5800d000 for devices... 3 USB Device(s) found
>        scanning usb for storage devices... 2 Storage Device(s) found
> STM32MP> usb tree
> USB device tree:
>   1  Hub (480 Mb/s, 0mA)
>   |   U-Boot Root Hub
>   |
>   +-2  Mass Storage (480 Mb/s, 300mA)
>        Verbatim STORE N GO 070731C8ACD7EE97
> 
>   1  Hub (480 Mb/s, 0mA)
>   |  u-boot EHCI Host Controller
>   |
>   +-2  Hub (480 Mb/s, 2mA)
>     |
>     +-3  Mass Storage (480 Mb/s, 500mA)
>          Generic  USB Storage
> 
> STM32MP> ls usb 0
> <DIR>       4096 .
> <DIR>       4096 ..
> <DIR>      16384 lost+found
> <DIR>       4096 record
>          1490212 xipImage
>         21058006 vmlinux
> 
> STM32MP> load usb 0 0xC0000000 vmlinux
> 21058006 bytes read in 10851 ms (1.9 MiB/s)
> 
> 
> Changes in v3:
> - Add stub for clk_disable_bulk
> 
> Changes in v2:
> - update dev_err
> - update commit message
> - change dev_err to dev_dbg for PHY function call
> - treat dwc2_shutdown_phy error
> - add clk_disable_bulk in dwc2_usb_remove
> 
> Patrick Delaunay (5):
>   dm: clk: add stub for clk_disable_bulk when CONFIG_CLK is desactivated
>   usb: host: dwc2: add phy support
>   usb: host: dwc2: add clk support
>   usb: host: dwc2: force reset assert
>   usb: host: dwc2: add trace to have clean usb start
> 
>  drivers/usb/host/dwc2.c | 100
> +++++++++++++++++++++++++++++++++++++++-
>  include/clk.h           |   4 ++
>  2 files changed, 103 insertions(+), 1 deletion(-)
> 
> --
> 2.17.1

Any comments on this serie or I need to rebase it and resend the serie ?

http://patchwork.ozlabs.org/project/uboot/list/?series=142257

Sorry for the delay...
I miss the previous merge windows for v2020.01 and now I think it also the case for v2020.04 !

The previous version v2 was almost ready
http://patchwork.ozlabs.org/project/uboot/list/?series=141678&state=*

In v3 I only solve the compilation issue on some board with patch 1/5
(= http://patchwork.ozlabs.org/patch/1193397/)

PS: for other remarks I create a separate serie:
       http://patchwork.ozlabs.org/project/uboot/list/?series=142260

Regards

Patrick