[Patch v2 1/3] mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*

[Vignesh Raghavendra]

On 11/02/20 11:59 am, Kuldeep Singh wrote:
> Commit "658df8bd9464"(mtd: spi-nor-core: Add octal mode support) enables
> octal mode(1-1-8) support in spi-nor framework.
> 
> mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O.
> Hence, enable SPI_NOR_OCTAL_READ flag for these flashes.
> 
> Signed-off-by: Kuldeep Singh <kuldeep.singh at nxp.com>

Reviewed-by: Vignesh Raghavendra <vigneshr at ti.com>

> ---
> v2: Reword commit message
> 
>  drivers/mtd/spi/spi-nor-ids.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 973b6f8..334c074 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -182,8 +182,8 @@ const struct flash_info spi_nor_ids[] = {
>  	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>  	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>  	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> -	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_4B_OPCODES) },
> -	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_4B_OPCODES) },
> +	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
> +	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
>  #endif
>  #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
>  	/* Spansion/Cypress -- single (large) sector size only, at least
> 

-- 
Regards
Vignesh