[PATCH v2 00/21] Enable ARM Trusted Firmware for U-Boot
chee.hong.ang at intel.com
chee.hong.ang at intel.com
Wed Feb 19 13:25:25 CET 2020
From: "Ang, Chee Hong" <chee.hong.ang at intel.com>
v2 changes:
- Default defconfig support SPL + ATF + U-Boot boot flow:
(socfpga_stratix10_defconfig / socfpga_agilex_defconfig)
SPL (EL3) -> ATF-BL31 (EL3) -> U-Boot Proper (EL2) -> Linux (EL1)
Added new defconfig to support existing SPL + U-Boot (no ATF) boot flow:
(socfpga_stratix10_nofw_defconfig / socfpga_agilex_nofw_defconfig)
SPL (EL3) -> U-Boot Proper (EL3) -> Linux (EL1)
- SMC/PSCI calls (EL2) / secure code (EL3) is built in compile time
- Mailbox/FPGA reconfiguration driver now support ATF or without ATF
v1:
https://lists.denx.de/pipermail/u-boot/2019-December/392424.html
These patchsets have dependency on:
https://lists.denx.de/pipermail/u-boot/2019-September/384906.html
Chee Hong Ang (21):
configs: agilex: Remove CONFIG_OF_EMBED
arm: socfpga: add fit source file for pack itb with ATF
arm: socfpga: Add function for checking description from FIT image
arm: socfpga: Load FIT image with ATF support
arm: socfpga: Override 'lowlevel_init' to support ATF
configs: socfpga: Enable FIT image loading with ATF support
arm: socfpga: Disable "spin-table" method for booting Linux
arm: socfpga: Add SMC helper function for Intel SOCFPGA (64bits)
arm: socfpga: Define SMC function identifiers for PSCI SiP services
arm: socfpga: Add secure register access helper functions for SoC
64bits
arm: socfpga: Secure register access for clock manager (SoC 64bits)
arm: socfpga: Secure register access in PHY mode setup
arm: socfpga: Secure register access for reading PLL frequency
mmc: dwmmc: socfpga: Secure register access in MMC driver
net: designware: socfpga: Secure register access in MAC driver
arm: socfpga: Secure register access in Reset Manager driver
arm: socfpga: stratix10: Initialize timer in SPL
arm: socfpga: Bridge reset invokes SMC service calls in EL2
arm: socfpga: stratix10: Add ATF support to FPGA reconfig driver
arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to
mbox_reset_cold()
configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF
support
arch/arm/mach-socfpga/Kconfig | 2 -
arch/arm/mach-socfpga/Makefile | 8 +
arch/arm/mach-socfpga/board.c | 10 +
arch/arm/mach-socfpga/clock_manager_agilex.c | 5 +-
arch/arm/mach-socfpga/clock_manager_s10.c | 5 +-
arch/arm/mach-socfpga/include/mach/misc.h | 3 +
.../mach-socfpga/include/mach/secure_reg_helper.h | 20 ++
arch/arm/mach-socfpga/lowlevel_init.S | 85 +++++
arch/arm/mach-socfpga/mailbox_s10.c | 4 +
arch/arm/mach-socfpga/misc_s10.c | 49 ++-
arch/arm/mach-socfpga/reset_manager_s10.c | 31 +-
arch/arm/mach-socfpga/secure_reg_helper.c | 57 ++++
arch/arm/mach-socfpga/timer_s10.c | 3 +-
arch/arm/mach-socfpga/wrap_pll_config_s10.c | 9 +-
board/altera/soc64/its/fit_spl_atf.its | 52 +++
configs/socfpga_agilex_defconfig | 9 +-
...lex_defconfig => socfpga_agilex_nofw_defconfig} | 2 +-
configs/socfpga_stratix10_defconfig | 8 +-
..._defconfig => socfpga_stratix10_nofw_defconfig} | 2 +-
drivers/fpga/stratix10.c | 141 +++++++-
drivers/mmc/socfpga_dw_mmc.c | 7 +-
drivers/net/dwmac_socfpga.c | 5 +-
include/configs/socfpga_soc64_common.h | 4 +
include/linux/intel-smc.h | 374 +++++++++++++++++++++
24 files changed, 857 insertions(+), 38 deletions(-)
create mode 100644 arch/arm/mach-socfpga/include/mach/secure_reg_helper.h
create mode 100644 arch/arm/mach-socfpga/lowlevel_init.S
create mode 100644 arch/arm/mach-socfpga/secure_reg_helper.c
create mode 100644 board/altera/soc64/its/fit_spl_atf.its
copy configs/{socfpga_agilex_defconfig => socfpga_agilex_nofw_defconfig} (97%)
copy configs/{socfpga_stratix10_defconfig => socfpga_stratix10_nofw_defconfig} (97%)
create mode 100644 include/linux/intel-smc.h
--
2.7.4
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