[PATCH v2 10/21] arm: socfpga: Add secure register access helper functions for SoC 64bits

Marek Vasut marex at denx.de
Tue Feb 25 18:54:20 CET 2020


On 2/24/20 3:21 AM, Ang, Chee Hong wrote:
[...]

>>>>> Currently, we have like 20+ secure registers allowed access by
>>>>> drivers running in non-secure mode (U-Boot proper / Linux).
>>>>> I don't think we want to define and maintain those high level
>>>>> interfaces for each of those secure register accesses in ATF and U-Boot.
>>>>
>>>> See above.
>>> OK. Then these secure access register should be set up in SPL (EL3).
>>> U-Boot drivers shouldn't access them at all because the driver may be
>>> running in SPL(EL3) and in U-Boot proper (EL2) too.
>>> I can take a look at those drivers accessing secure registers and try
>>> to move/decouple those secure access from U-Boot drivers to SPL (EL3)
>>> then we no longer need those secure register access functions.
>>
>> I think that would be great, no ?
> Since the SDMMC/DWMAC drivers read the device tree to configure the behaviour
> of the hardware via the secure registers. I think it should still be part of the
> driver instead of configuring the hardware in different places. I have proposed
> using ATF's high-level APIs to achieve this when the driver is running in EL2.
> I have already proposed this in other email threads.
> Are you OK with this approach ?

I think something more high level might be a good idea here.


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