[PATCH] arm: mvebu: update RTC values for PCIe memory wrappers
Chris.Packham at alliedtelesis.co.nz
Wed Feb 26 07:46:44 CET 2020
On Wed, 2020-02-26 at 06:49 +0200, Baruch Siach wrote:
> Hi Chris,
> On Wed, Feb 26 2020, Chris Packham wrote:
> > From: Chris Packham <chris.packham at alliedtelesis.co.nz>
> > Update the RTC (Read Timing Control) values for PCIe memory
> > wrappers
> > following an ERRATA (ERRATA# TDB). This means the PCIe accesses
> > will
> > used slower memory Read Timing, to allow more efficient energy
> > consumption, in order to lower the minimum VDD of the memory. Will
> > lead
> > to more robust memory when voltage drop occurs (VDDSEG)
> Have you seen memory access reliability problems because of this
We're seeing a few different symptoms but they all consist of a PCIe
transfer failing in some way (as far as we can tell in the TX direction
from the CPU).
> > The code is based on changes from Marvell's U-Boot, specifically:
> The last link looks duplicated.
Hmm I was pretty sure there were 4 commits. I'll double check and
either fix or remove the link.
More information about the U-Boot