[PATCH] rk3399: Add four clocks to clock driver needed by framebuffer
Wolfram Joost
u-boot at frokaschwei.de
Wed Feb 26 19:13:32 CET 2020
This patch adds the four clock gates
- ACLK_VOP0
- ACLK_VOP1
- HCLK_VOP0
- HCLK_VOP1
to the rockchip rk3399 clock drivers.
These clock gates were referenced by arch/arm/dts/rk3399.dtsi for
vopb and vopl.
The driver drivers/video/rockchip/rk3399_vop.c won't get probed
without these clocks and the framebuffer does not work.
---
drivers/clk/rockchip/clk_rk3399.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3399.c
b/drivers/clk/rockchip/clk_rk3399.c
index 865b80cc0f..a3628d4a4c 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -923,6 +923,11 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
case DCLK_VOP0:
case DCLK_VOP1:
break;
+ case ACLK_VOP0:
+ case ACLK_VOP1:
+ case HCLK_VOP0:
+ case HCLK_VOP1:
+ break;
case PCLK_EFUSE1024NS:
break;
case SCLK_SARADC:
@@ -994,6 +999,12 @@ static ulong rk3399_clk_set_rate(struct clk *clk,
ulong rate)
case DCLK_VOP1:
ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);
break;
+ case ACLK_VOP0:
+ case ACLK_VOP1:
+ case HCLK_VOP0:
+ case HCLK_VOP1:
+ /* clock gates are enabled by default */
+ break;
case SCLK_DDRCLK:
ret = rk3399_ddr_set_clk(priv->cru, rate);
break;
--
2.25.1
More information about the U-Boot
mailing list