[PATCH v2] arm: mvebu: update RTC values for PCIe memory wrappers

[Stefan Roese]

On 26.02.20 07:53, Chris Packham wrote:
> From: Chris Packham <chris.packham at alliedtelesis.co.nz>
> 
> Update the RTC (Read Timing Control) values for PCIe memory wrappers
> following an ERRATA (ERRATA# TDB). This means the PCIe accesses will
> used slower memory Read Timing, to allow more efficient energy
> consumption, in order to lower the minimum VDD of the memory.  Will lead
> to more robust memory when voltage drop occurs (VDDSEG)
> 
> The code is based on changes from Marvell's U-Boot, specifically:
> 
> https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/20cd2704072512de176e048970f2883db901674b
> https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/eb608a7c8dd0d42b87601a61b9c0cc5615ab94b2
> https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c4af19ae2bf08cf6e450e741ce4f04d402a5cb6b
> 
> Signed-off-by: Chris Packham <chris.packham at alliedtelesis.co.nz>
> Signed-off-by: Chris Packham <judge.packham at gmail.com>

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

> ---
> I've signed-off using both my email addresses. I normally do u-boot
> stuff via gmail for convenience but this is definitely a work thing.
> 
> Changes in v2:
> - drop duplicated link in commit message
> 
>   arch/arm/mach-mvebu/include/mach/cpu.h        |  2 ++
>   arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c | 17 +++++++++++++++++
>   arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h | 13 +++++++++++++
>   arch/arm/mach-mvebu/spl.c                     |  3 +++
>   4 files changed, 35 insertions(+)
> 
> diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
> index 2e2d72aac892..fa7c81754b8f 100644
> --- a/arch/arm/mach-mvebu/include/mach/cpu.h
> +++ b/arch/arm/mach-mvebu/include/mach/cpu.h
> @@ -166,8 +166,10 @@ int ddr3_init(void);
>   /* Auto Voltage Scaling */
>   #if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X)
>   void mv_avs_init(void);
> +void mv_rtc_config(void);
>   #else
>   static inline void mv_avs_init(void) {}
> +static inline void mv_rtc_config(void) {}
>   #endif
>   
>   /*
> diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
> index e9dd096ad0f5..3c4c7e01a1cd 100644
> --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
> +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
> @@ -257,6 +257,23 @@ u8 sys_env_device_rev_get(void)
>   	return (value & (REVISON_ID_MASK)) >> REVISON_ID_OFFS;
>   }
>   
> +void mv_rtc_config(void)
> +{
> +	u32 i, val;
> +
> +	if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X)))
> +		return;
> +
> +	/* Activate pipe0 for read/write transaction, and set XBAR client number #1 */
> +	val = 0x1 << DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS |
> +	      0x1 << DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS;
> +	writel(val, MVEBU_DFX_BASE);
> +
> +	/* Set new RTC value for all memory wrappers */
> +	for (i = 0; i < RTC_MEMORY_WRAPPER_COUNT; i++)
> +		reg_write(RTC_MEMORY_WRAPPER_REG(i), RTC_MEMORY_WRAPPER_CTRL_VAL);
> +}
> +
>   void mv_avs_init(void)
>   {
>   	u32 sar_freq;
> diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
> index 1774a5b780ca..17cd811331d2 100644
> --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
> +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
> @@ -150,6 +150,19 @@
>   #define MPP_UART1_SET_MASK		(~(0xff000))
>   #define MPP_UART1_SET_DATA		(0x66000)
>   
> +#define DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS	0
> +/* DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS: Since address completion in 14bit
> + * address mode, and given that [14:8] => [19:13], the 2 lower bits [9:8] =>
> + * [14:13] are dismissed. hence field offset is also shifted to 10
> + */
> +#define DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS	10
> +
> +#define RTC_MEMORY_CTRL_REG_BASE	0xE6000
> +#define RTC_MEMORY_WRAPPER_COUNT	8
> +#define RTC_MEMORY_WRAPPER_REG(i)	(RTC_MEMORY_CTRL_REG_BASE + ((i) * 0x40))
> +#define RTC_MEMORY_CTRL_PDLVMC_FIELD_OFFS	6
> +#define RTC_MEMORY_WRAPPER_CTRL_VAL	(0x1 << RTC_MEMORY_CTRL_PDLVMC_FIELD_OFFS)
> +
>   #define AVS_DEBUG_CNTR_REG		0xe4124
>   #define AVS_DEBUG_CNTR_DEFAULT_VALUE	0x08008073
>   
> diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
> index a99bf166fd85..70fef3b573d9 100644
> --- a/arch/arm/mach-mvebu/spl.c
> +++ b/arch/arm/mach-mvebu/spl.c
> @@ -130,6 +130,9 @@ void board_init_f(ulong dummy)
>   	/* Initialize Auto Voltage Scaling */
>   	mv_avs_init();
>   
> +	/* Update read timing control for PCIe */
> +	mv_rtc_config();
> +
>   	/*
>   	 * Return to the BootROM to continue the Marvell xmodem
>   	 * UART boot protocol. As initiated by the kwboot tool.
> 


Viele Grüße,
Stefan

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