[PATCH 06/10] arm: mvebu: clearfog: Add config for 2GB SOM

[Baruch Siach]

Hi Joel,

On Sat, Jan 11 2020, Joel Johnson wrote:
> While 1GB SOM parts are much more common, provide a build config
> option for supporting parts with 2GB.
>
> Signed-off-by: Joel Johnson <mrjoel at lixil.net>
> ---
>
>  board/solidrun/clearfog/Kconfig    | 6 ++++++
>  board/solidrun/clearfog/clearfog.c | 8 ++++++++
>  2 files changed, 14 insertions(+)
>
> diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig
> index 53f01daf7a..fd880ee591 100644
> --- a/board/solidrun/clearfog/Kconfig
> +++ b/board/solidrun/clearfog/Kconfig
> @@ -31,4 +31,10 @@ config CLEARFOG_SFP_25GB
>  	 SGMII connection (requires a supporting SFP). By default, transfer speed
>  	 of 1.25 Gbps is used, suitable for a more common 1 Gbps SFP module.
>
> +config CLEARFOG_2GB_SOM
> +	bool "Configure for a SOM with 2GB RAM"
> +	help
> +	 Enable support for the 2GB RAM SOM variant. If this option is not
> +	 enabled then the more common 1GB version will be used.
> +
>  endmenu
> diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
> index 247785ac56..38f411b942 100644
> --- a/board/solidrun/clearfog/clearfog.c
> +++ b/board/solidrun/clearfog/clearfog.c
> @@ -67,11 +67,19 @@ static struct mv_ddr_topology_map board_topology_map = {
>  	DEBUG_LEVEL_ERROR,
>  	0x1, /* active interfaces */
>  	/* cs_mask, mirror, dqs_swap, ck_swap X PUPs */
> +#if defined (CONFIG_CLEARFOG_2GB_SOM)
> +	{ { { {0x3, 0, 0, 0},
> +	      {0x3, 0, 0, 0},
> +	      {0x3, 0, 0, 0},
> +	      {0x3, 0, 0, 0},
> +	      {0x3, 0, 0, 0} },

That can only work for 2GB SOMs with twin-die RAM configuration. SOMs
with single-die RAM need MV_DDR_DIE_CAP_8GBIT in the mem_size field
instead. See board/kobol/helios4/helios4.c. See also

  https://patchwork.ozlabs.org/patch/1200332/

You should also adjust the ODT configuration to assert M_ODT[0] of both
chip-selects, since only M_ODT[0] is connected on the A388 SOM. See the
comment I added to the cherry-picked commit log in

  https://github.com/SolidRun/u-boot/commit/ab15b2d5b6ee50c106628dc0aa5943747a5dd772

Wrong ODT configuration might cause memory corruption in high RAM
traffic load.

I have a patch adding support for per-board ODT configuration. I have
not posted it yet to the list.

baruch

> +#else
>  	{ { { {0x1, 0, 0, 0},
>  	      {0x1, 0, 0, 0},
>  	      {0x1, 0, 0, 0},
>  	      {0x1, 0, 0, 0},
>  	      {0x1, 0, 0, 0} },
> +#endif
>  	    SPEED_BIN_DDR_1600K,	/* speed_bin */
>  	    MV_DDR_DEV_WIDTH_16BIT,	/* memory_width */
>  	    MV_DDR_DIE_CAP_4GBIT,	/* mem_size */


--
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