[PATCH] versal: drivers: clk: Fix invalid clock name queries

Michal Simek michal.simek at xilinx.com
Fri Jan 17 08:31:33 CET 2020


From: Rajan Vaja <rajan.vaja at xilinx.com>

The clock driver makes EEMI call to get the name of invalid clk
when executing versal_get_clock_info() function. This results in
error messages.
Added check for validating clock before saving clock attribute and
calling versal_pm_clock_get_name() in versal_get_clock_info() function.

Signed-off-by: Rajan Vaja <rajan.vaja at xilinx.com>
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---

 drivers/clk/clk_versal.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index 7e97b0c4bf3a..6ca46c612df8 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -569,6 +569,12 @@ static void versal_get_clock_info(void)
 			continue;
 
 		clock[i].valid = attr & CLK_VALID_MASK;
+
+		/* skip query for Invalid clock */
+		ret = versal_is_valid_clock(i);
+		if (ret != CLK_VALID_MASK)
+			continue;
+
 		clock[i].type = ((attr >> CLK_TYPE_SHIFT) & 0x1) ?
 				CLK_TYPE_EXTERNAL : CLK_TYPE_OUTPUT;
 		nodetype = (attr >> NODE_TYPE_SHIFT) & NODE_CLASS_MASK;
-- 
2.25.0



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