[PATCH] arm: dts: i.mx8x: add #cooling-cells properties
Stefano Babic
sbabic at denx.de
Sat Jan 18 16:15:19 CET 2020
On 18/01/20 16:12, Anatolij Gustschin wrote:
> Fix dtb building warnings:
> Warning (cooling_device_property): /thermal-zones/cpu-thermal0/cooling-maps/map0:
> Missing property '#cooling-cells' in node /cpus/cpu at 0 or bad phandle (referred from cooling-device[0])
>
Thanks for fixing this.
> Signed-off-by: Anatolij Gustschin <agust at denx.de>
> ---
> arch/arm/dts/fsl-imx8-ca35.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/dts/fsl-imx8-ca35.dtsi b/arch/arm/dts/fsl-imx8-ca35.dtsi
> index 28bc32c8b7..9af8b1511c 100644
> --- a/arch/arm/dts/fsl-imx8-ca35.dtsi
> +++ b/arch/arm/dts/fsl-imx8-ca35.dtsi
> @@ -18,6 +18,7 @@
> reg = <0x0 0x0>;
> enable-method = "psci";
> next-level-cache = <&A35_L2>;
> + #cooling-cells = <2>;
> };
>
> A35_1: cpu at 1 {
> @@ -26,6 +27,7 @@
> reg = <0x0 0x1>;
> enable-method = "psci";
> next-level-cache = <&A35_L2>;
> + #cooling-cells = <2>;
> };
>
> A35_2: cpu at 2 {
> @@ -34,6 +36,7 @@
> reg = <0x0 0x2>;
> enable-method = "psci";
> next-level-cache = <&A35_L2>;
> + #cooling-cells = <2>;
> };
>
> A35_3: cpu at 3 {
> @@ -42,6 +45,7 @@
> reg = <0x0 0x3>;
> enable-method = "psci";
> next-level-cache = <&A35_L2>;
> + #cooling-cells = <2>;
> };
>
> A35_L2: l2-cache0 {
>
Reviewed-by: Stefano Babic <sbabic at denx.de>
Best regards,
Stefano Babic
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