[RFC] Vocore2 MMC needs clock patches

[Stefan Roese]

Hi Maruo,

On 22.01.20 21:16, Mauro Condarelli wrote:
> Hi Stefan,
> 
> On 1/21/20 1:08 PM, Stefan Roese wrote:
>> Hi Mauro,
>>
>> On 21.01.20 12:27, Mauro Condarelli wrote:
>>> Thanks Weijie,
>>> I made the changes You suggested.
>>> I have also seen You sent a new version of Your patches.
>>> Since mine are based on yours I *think* I should suspend
>>> sending my VoCore2 patches till Yours are fixed and integrated
>>> into master.
>>>
>>> @Stefan Roese: is this the right course of action?
>>
>> I think in the current state of Weijie's patches (v3), you can resume
>> sending your VoCore2 support based on this latest patchset to the
>> list. Please don't attach a patch but send it inline next time
>> (git send-email) to enable review.
> I will send next iteration as soon as I fix the reflash problem (see below).
>   
> ===8<----
>>> Side Question: Stefan wrote:
>>>> Most of this can be done by using the
>>>> RAM version now (again). There is no additional RAM booting target now
>>>> any more. You can use the normal U-Boot image for this now. Please note
>>>> the changes TEXT_BASE here. Its now 0x80200000.
>>> This actually seems to work right if I start from my original u-boot
>>> (1.1.3,
>>> flashed at start of SPI NOR), but it fails if I start from a flashed
>>> (at the
>>> same location) u-boot-mtmips.bin
>>> I *think* this happens because unpacking actually writes u-boot at
>>> 0x80200000 and runs it from there, so "load usb 0:1 80200000 u-boot.bin"
>>> (or equivalent) will overwrite the running u-boot and the following
>>> "go ${fileaddr}" fails:
>>>      ## Starting application at 0x80200000 ...
>>>      <DEAD>
>>
>> No, U-Boot relocates itself to the end of RAM and runs from there. So
>> this should work. Perhaps a cache flush is missing.
>>
>> I'll give it a try on my LinkIt board as well later.
> Did You manage to test this?

Yes. I just tested for a few minutes and it seems to work on the LinkIt
board:

=> printenv tt
tt=tftp 80200000 ${tftpdir}/u-boot.bin;dcache off;go ${fileaddr}
=> run tt
Using eth at 10110000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.233
Filename 'linkit-smart-7688/u-boot.bin'.
Load address: 0x80200000
Loading: ###############################
          4.8 MiB/s
done
Bytes transferred = 450139 (6de5b hex)
Unknown command 'dcache' - try 'help'
## Starting application at 0x80200000 ...


U-Boot 2020.01-00680-g90cb39245e (Jan 21 2020 - 10:54:50 +0100)

CPU:   MediaTek MT7688A ver:1 eco:2
Boot:  DDR2, SPI-NOR 4-Byte Addr, CPU clock from XTAL
Clock: CPU: 580MHz, Bus: 193MHz, XTAL: 40MHz
Model: LinkIt-Smart-7688
...

> I am currently testing loading from "paleolithic" u-boot, but I want to fix
> this before I finalize VoCore2 patches.
> 
> I tried to do some manual testing enabling CONFIG_CMD_CACHE, but this
> bombs with Weijie patches with:
> 
>    LD      u-boot
> mipsel-linux-ld.bfd: cmd/built-in.o: in function `do_icache':
> cmd/cache.c:(.text.do_icache+0x5c): undefined reference to `icache_disable'
> mipsel-linux-ld.bfd: cmd/cache.c:(.text.do_icache+0x6c): undefined
> reference to `icache_enable'
> mipsel-linux-ld.bfd: cmd/cache.c:(.text.do_icache+0x8c): undefined
> reference to `icache_status'
> make: *** [Makefile:1697: u-boot] Error 1
> 
> icache seems enabled unconditionally in
> arch/mips/mach-mtmips/mt7628/lowlevel_init.S::73+
> 
> I will try to add dummy functions just-to-play.

No need to "play" with these cache functions. Its included in the
LinkIt image and should be in yours as well, if you didn't change
too much.

Thanks,
Stefan