[RFC][PATCH v4] Add support for SoM "VoCore2"
Mauro Condarelli
mc5686 at mclink.it
Wed Jan 29 10:41:29 CET 2020
Foreword:
Patch sent as reference only, as it *still* does not work as expected.
Most likely some cache misalignment is afoot (but I didn't change
anything there).
Symptoms are:
* Dynamically loading a *different* version of U-Boot with:
usb start; load usb 0:1 80200000 u-boot.bin; go 80200000
very often does not work. Workaround is:
usb start; load usb 0:1 80200000 u-boot.bin; load usb 0:1 85000000
uImage; go 80200000
* I noticed a very strange behavior with Linux command line handling:
U-Boot 2020.01-00646-g03de3f19fa (Jan 28 2020 - 22:56:42 +0100)
CPU: MediaTek MT7628A ver:1 eco:2
Boot: DDR2, SPI-NOR 3-Byte Addr, CPU clock from XTAL
Clock: CPU: 580MHz, Bus: 193MHz, XTAL: 40MHz
Model: VoCore2
DRAM: 128 MiB
WDT: Started with servicing (60s timeout)
MMC: mmc at 10130000: 0
Loading Environment from FAT... OK
Model: VoCore2
=> load mmc 0:5 85000000 /boot/uImage
2329562 bytes read in 141 ms (15.8 MiB/s)
=> printenv
bootcmd=load mmc 0:2 85000000 /boot/uImage; load mmc 0:2 86000000
/boot/initrd; setenv bootargs ${default_bootargs} mtdparts=${mtdparts}
rd_start=0x${fileaddr} rd_size=0x${filesize} USE=mmc; bootm 85000000
bootdelay=5
default_bootargs=earlyprintk rootwait console=ttyS2,115200
fdtcontroladdr=87e7c2e8
fileaddr=85000000
filesize=238bda
mtdids=nor0=spi0.0
mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)
stderr=uart2 at e00
stdin=uart2 at e00
stdout=uart2 at e00
ver=U-Boot 2020.01-00646-g03de3f19fa (Jan 28 2020 - 22:56:42 +0100)
Environment size: 716/4092 bytes
=> setenv bootargs ${default_bootargs} mtdparts=${mtdparts}
root=/dev/mmcblk0p5
=>
printenv
bootargs=earlyprintk rootwait console=ttyS2,115200
mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)
mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)
root=/dev/mmcblk0p5
bootcmd=load mmc 0:2 85000000 /boot/uImage; load mmc 0:2 86000000
/boot/initrd; setenv bootargs ${default_bootargs} mtdparts=${mtdparts}
rd_start=0x${fileaddr} rd_size=0x${filesize} USE=mmc; bootm 85000000
bootdelay=5
default_bootargs=earlyprintk rootwait console=ttyS2,115200
mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)
fdtcontroladdr=87e7c2e8
fileaddr=85000000
filesize=238bda
mtdids=nor0=spi0.0
mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)
stderr=uart2 at e00
stdin=uart2 at e00
stdout=uart2 at e00
ver=U-Boot 2020.01-00646-g03de3f19fa (Jan 28 2020 - 22:56:42 +0100)
Environment size: 941/4092 bytes
=> bootm ${fileaddr}
## Booting kernel from Legacy Image at 85000000 ...
Image Name: Linux-5.3.0
Image Type: MIPS Linux Kernel Image (gzip compressed)
Data Size: 2329498 Bytes = 2.2 MiB
Load Address: 80000000
Entry Point: 803fc050
Verifying Checksum ... OK
Uncompressing Kernel Image
[ 0.000000] Linux version 5.3.0 (mcon at cinderella) (gcc version 8.3.0
(Buildroot 2019.11-git-01046-g084c788231-dirty)) #4 PREEMPT Wed Jan 29
00:29:59 CET 2020
[ 0.000000] Board has DDR2
[ 0.000000] Analog PMU set to hw control
[ 0.000000] Digital PMU set to hw control
[ 0.000000] SoC Type: MediaTek MT7628AN ver:1 eco:2
[ 0.000000] printk: bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 00019655 (MIPS 24KEc)
[ 0.000000] MIPS: machine is VoCore2
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 08000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Primary instruction cache 64kB, VIPT, 4-way, linesize 32
bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases,
linesize 32 bytes
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Initmem setup node 0 [mem
0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480
[ 0.000000] Kernel command line:
mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)
mtdparts=spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)
root=/dev/mmcblk0p5
*** here command line seems truncated (missing first part) and missing
"console" and "rootwait" result in WDT reboot.
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536
bytes, linear)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768
bytes, linear)
[ 0.000000] Writing ErrCtl register=00065516
[ 0.000000] Readback ErrCtl register=00065516
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 124656K/131072K available (4107K kernel code,
221K rwdata, 480K rodata, 176K init, 95K bss, 6416K reserved, 0K
cma-reserved)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
[ 0.000000] Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay
is 10 jiffies.
[ 0.000000] NR_IRQS: 256
[ 0.000000] intc: using register map from devicetree
[ 0.000000] random: get_random_bytes called from 0x804b4a4c with
crng_init=0
[ 0.000000] CPU Clock: 580MHz
[ 0.000000] timer_probe: no matching timers found
[ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles:
0xffffffff, max_idle_ns: 6590553264 ns
[ 0.000012] sched_clock: 32 bits at 290MHz, resolution 3ns, wraps
every 7405115902ns
[ 0.008046] Console: colour dummy device 80x25
[ 0.012474] printk: console [tty0] enabled
[ 0.016608] printk: bootconsole [early0] disabled
Here workaround is to have "setenv bootargs ${default_bootargs}
mtdparts=${mtdparts} root=/dev/mmcblk0p5 ${default_bootargs}"; I.e.:
insert ${default_bootargs} *twice* (simply moving it to end would result
in missing "mtdparts").
* given the above environment, shouldn't autoboot be attempted?
* I also tried enabling CONFIG_CMD_CACHE, but compilation fails with:
...
LD u-boot
mipsel-linux-ld.bfd: cmd/built-in.o: in function `do_icache':
cmd/cache.c:(.text.do_icache+0x5c): undefined reference to `icache_disable'
mipsel-linux-ld.bfd: cmd/cache.c:(.text.do_icache+0x6c): undefined
reference to `icache_enable'
mipsel-linux-ld.bfd: cmd/cache.c:(.text.do_icache+0x8c): undefined
reference to `icache_status'
make: *** [Makefile:1695: u-boot] Error 1
My only guess, ATM, is I goofed somehow applying Weijie patches: I'll
try rebuilding from a pristine "master".
Can someone confirm patchset "[v3,xx/20]Refactor the architecture parts
of mt7628" still applies cleanly?
Side issue: patman complain with:
mcon at cinderella:~/vocore/__V2__/u-boot$ ./tools/patman/patman -n -c1 -m
Cleaned 1 patches
0 errors, 1 warnings, 0 checks for 0001-Add-support-for-SoM-VoCore2.patch:
<unknown>:0: warning: added, moved or deleted file(s), does MAINTAINERS
need updating?
checkpatch.pl found 0 error(s), 1 warning(s), 0 checks(s)
What should I do?
Any hint welcome.
Regards and TiA!
Mauro
=================================================
Small patch series to add support for VoCore/VoCore2 board.
VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.
Details about this SoM can be found at "https://vocore.io/v2.html".
Signed-off-by: Mauro Condarelli <mc5686 at mclink.it>
---
Changes in v4:
- Reverted some overzealous DTS cleaning.
- Added support for bootcount
Changes in v3:
- based on top of Weijie Gao patchset:
"[v3,xx/20]Refactor the architecture parts of mt7628"
Changes in v2:
- Removed some dead code
- Changed Author to my full name (no nick)
- Removed unwanted fixup to .dts generation (not my call).
- Fixed commit message
- Fixed various variables/filenames to include Vendor name
- Changed Vendor name (Vonger -> Vocore)
arch/mips/dts/Makefile | 1 +
arch/mips/dts/mt7628a.dtsi | 5 ++
arch/mips/dts/vocore_vocore2.dts | 76 ++++++++++++++++++++++
arch/mips/mach-mtmips/Kconfig | 8 +++
board/vocore/vocore2/Kconfig | 12 ++++
board/vocore/vocore2/Makefile | 3 +
board/vocore/vocore2/board.c | 33 ++++++++++
configs/vocore2_defconfig | 105 +++++++++++++++++++++++++++++++
include/configs/vocore2.h | 61 ++++++++++++++++++
9 files changed, 304 insertions(+)
create mode 100644 arch/mips/dts/vocore_vocore2.dts
create mode 100644 board/vocore/vocore2/Kconfig
create mode 100644 board/vocore/vocore2/Makefile
create mode 100644 board/vocore/vocore2/board.c
create mode 100644 configs/vocore2_defconfig
create mode 100644 include/configs/vocore2.h
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index cbd0c8bc8b..f711e9fb59 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -23,6 +23,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) +=
netgear,dgnd3700v2.dtb
dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
+dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 6baa63add3..192599c37f 100644
--- a/arch/mips/dts/mt7628a.dtsi
+++ b/arch/mips/dts/mt7628a.dtsi
@@ -402,6 +402,11 @@
builtin-cd = <1>;
r_smpl = <1>;
+ bus-width = <4>;
+ max-frequency = <48000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+
clocks = <&clk48m>, <&clkctrl CLK_SDXC>;
clock-names = "source", "hclk";
diff --git a/arch/mips/dts/vocore_vocore2.dts
b/arch/mips/dts/vocore_vocore2.dts
new file mode 100644
index 0000000000..b8fd87a3e9
--- /dev/null
+++ b/arch/mips/dts/vocore_vocore2.dts
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686 at mclink.it>
+ */
+
+/dts-v1/;
+
+#include "mt7628a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "vocore,vocore2", "ralink,mt7628a-soc";
+ model = "VoCore2";
+
+ aliases {
+ serial0 = &uart2;
+ spi0 = &spi0;
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x08000000>;
+ };
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "vocore:power";
+ gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ chosen {
+ bootargs = "console=ttyS2,115200";
+ stdout-path = &uart2;
+ };
+};
+
+&pinctrl {
+ state_default: pin_state {
+ p0led {
+ groups = "p0led_a";
+ function = "led";
+ };
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+ nor0: spi-flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ };
+};
+
+ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ephy_iot_mode>;
+ mediatek,poll-link-phy = <0>;
+};
+
+&mmc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_iot_mode>;
+ pinctrl-1 = <&sd_iot_mode>;
+};
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index bcd635f438..489e466daf 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -83,6 +83,13 @@ config BOARD_MT7628_RFB
SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host,
1 SDXC, 1 PCIe socket and JTAG pins.
+config BOARD_VOCORE2
+ bool "VoCore2"
+ depends on SOC_MT7628
+ help
+ VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
+ and 16 MiB of flash (SPI).
+
endchoice
config SPL_UART2_SPIS_PINMUX
@@ -96,5 +103,6 @@ config SPL_UART2_SPIS_PINMUX
source "board/gardena/smart-gateway-mt7688/Kconfig"
source "board/mediatek/mt7628/Kconfig"
source "board/seeed/linkit-smart-7688/Kconfig"
+source "board/vocore/vocore2/Kconfig"
endmenu
diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig
new file mode 100644
index 0000000000..baeff31b69
--- /dev/null
+++ b/board/vocore/vocore2/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_VOCORE2
+
+config SYS_BOARD
+ default "vocore2"
+
+config SYS_VENDOR
+ default "vocore"
+
+config SYS_CONFIG_NAME
+ default "vocore2"
+
+endif
diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile
new file mode 100644
index 0000000000..70cd7a8e56
--- /dev/null
+++ b/board/vocore/vocore2/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += board.o
diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c
new file mode 100644
index 0000000000..d387715d14
--- /dev/null
+++ b/board/vocore/vocore2/board.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686 at mclink.it>
+ *
+ * Note: this is largely copied from:
+ * board/seeed/linkit_smart_7688/board.c
+ * Copyright (C) 2018 Stefan Roese <sr at denx.de>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define MT76XX_GPIO1_MODE 0x10000060
+
+void board_debug_uart_init(void)
+{
+ void __iomem *gpio_mode;
+
+ /* Select UART2 mode instead of GPIO mode (default) */
+ gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
+ clrbits_le32(gpio_mode, GENMASK(27, 26));
+}
+
+int board_early_init_f(void)
+{
+ /*
+ * The pin muxing of UART2 also needs to be done, if debug uart
+ * is not enabled. So we need to call this function here as well.
+ */
+ board_debug_uart_init();
+
+ return 0;
+}
diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
new file mode 100644
index 0000000000..b0c15c02f6
--- /dev/null
+++ b/configs/vocore2_defconfig
@@ -0,0 +1,105 @@
+CONFIG_MIPS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x1000
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
+CONFIG_ARCH_MTMIPS=y
+CONFIG_BOARD_VOCORE2=y
+CONFIG_SPL_UART2_SPIS_PINMUX=y
+CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOT_GET_CMDLINE=y
+CONFIG_SYS_BOOT_GET_KBD=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_USE_BOOTARGS=y
+CONFIG_LOGLEVEL=8
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_AUTOBOOT is not set
+CONFIG_CMD_LICENSE=y
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_BOOTCOUNT=y
+# CONFIG_CMD_BLOCK_CACHE is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
+CONFIG_MTDPARTS_DEFAULT="spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)"
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+# CONFIG_NET is not set
+CONFIG_SPL_DM=y
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC=y
+CONFIG_DM_MMC=y
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MMC_MTK=y
+CONFIG_MTD=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+# CONFIG_DM_ETH is not set
+# CONFIG_RAM_ROCKCHIP_DEBUG is not set
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_CONS_INDEX=3
+CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_WDT=y
+CONFIG_WDT_MT7621=y
+CONFIG_FS_EXT4=y
+CONFIG_LZMA=y
+CONFIG_LZO=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
new file mode 100644
index 0000000000..6b43aa766e
--- /dev/null
+++ b/include/configs/vocore2.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686 at mclink.it>
+ */
+
+#ifndef __VOCORE2_CONFIG_H__
+#define __VOCORE2_CONFIG_H__
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
+
+/* RAM */
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
+
+/* SPL */
+#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SPL_BSS_START_ADDR 0x80010000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x10000
+#define CONFIG_SPL_MAX_SIZE 0x10000
+
+/* Dummy value */
+#define CONFIG_SYS_UBOOT_BASE 0
+
+/* Serial SPL */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_NS16550_CLK 40000000
+#define CONFIG_SYS_NS16550_REG_SIZE -4
+#define CONFIG_SYS_NS16550_COM3 0xb0000e00
+#define CONFIG_CONS_INDEX 3
+
+#endif
+
+/* UART */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
+ 230400, 460800, 921600 }
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START 0x80100000
+#define CONFIG_SYS_MEMTEST_END 0x80400000
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS 64
+#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
+#define CONFIG_SYS_CBSIZE 512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+
+/* Environment settings */
+
+#endif //__VOCORE2_CONFIG_H__
--
2.25.0
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