[PATCH] ddr: marvell: a38x: llow boards to specify CK_DELAY parameter

Chris Packham judge.packham at gmail.com
Thu Jan 30 00:50:44 CET 2020


For some layouts it is necessary to adjust the CK_DELAY parameter to
successfully complete DDR training. Add the ability to specify the
CK_DELAY in the mv_ddr_topology_map.

Signed-off-by: Chris Packham <judge.packham at gmail.com>
---

 board/alliedtelesis/x530/x530.c             |  6 +++++-
 drivers/ddr/marvell/a38x/ddr3_init.c        |  5 +++++
 drivers/ddr/marvell/a38x/ddr_topology_def.h |  3 +++
 drivers/ddr/marvell/a38x/mv_ddr_topology.c  | 10 ++++++++++
 drivers/ddr/marvell/a38x/mv_ddr_topology.h  |  1 +
 5 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index e0fa8067c1c5..04b053dc20e4 100644
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -66,7 +66,11 @@ static struct mv_ddr_topology_map board_topology_map = {
 	BUS_MASK_32BIT_ECC,		/* subphys mask */
 	MV_DDR_CFG_DEFAULT,		/* ddr configuration data source */
 	{ {0} },			/* raw spd data */
-	{0}				/* timing parameters */
+	{0},				/* timing parameters */
+	{ {0} },			/* electrical configuration */
+	{0},				/* electrical parameters */
+	0,				/* Clock enable mask */
+	160				/* Clock delay */
 };
 
 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c
index 22c8f9ca54e5..a971cc155a01 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.c
+++ b/drivers/ddr/marvell/a38x/ddr3_init.c
@@ -106,8 +106,10 @@ static int mv_ddr_training_params_set(u8 dev_num)
 	struct tune_train_params params;
 	int status;
 	u32 cs_num;
+	int ck_delay;
 
 	cs_num = mv_ddr_cs_num_get();
+	ck_delay = mv_ddr_ck_delay_get();
 
 	/* NOTE: do not remove any field initilization */
 	params.ck_delay = TUNE_TRAINING_PARAMS_CK_DELAY;
@@ -131,6 +133,9 @@ static int mv_ddr_training_params_set(u8 dev_num)
 		params.g_odt_config = TUNE_TRAINING_PARAMS_ODT_CONFIG_2CS;
 	}
 
+	if (ck_delay > 0)
+		params.ck_delay = ck_delay;
+
 	status = ddr3_tip_tune_training_params(dev_num, &params);
 	if (MV_OK != status) {
 		printf("%s Training Sequence - FAILED\n", ddr_type);
diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h b/drivers/ddr/marvell/a38x/ddr_topology_def.h
index 950f296ff984..34196b166287 100644
--- a/drivers/ddr/marvell/a38x/ddr_topology_def.h
+++ b/drivers/ddr/marvell/a38x/ddr_topology_def.h
@@ -127,6 +127,9 @@ struct mv_ddr_topology_map {
 
 	/* Clock enable mask */
 	u32 clk_enable;
+
+	/* Clock delay */
+	int ck_delay;
 };
 
 enum mv_ddr_iface_mode {
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_topology.c b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
index ef3b658a7899..09840b1e70f1 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_topology.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
@@ -229,6 +229,16 @@ int mv_ddr_is_ecc_ena(void)
 		return 0;
 }
 
+int mv_ddr_ck_delay_get(void)
+{
+	struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
+
+	if (tm->ck_delay)
+		return tm->ck_delay;
+
+	return -1;
+}
+
 /* translate topology map definition to real memory size in bits */
 static unsigned int mem_size[] = {
 	ADDR_SIZE_512MB,
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_topology.h b/drivers/ddr/marvell/a38x/mv_ddr_topology.h
index 766f25db5733..4fca47689f11 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_topology.h
+++ b/drivers/ddr/marvell/a38x/mv_ddr_topology.h
@@ -319,6 +319,7 @@ unsigned short mv_ddr_bus_bit_mask_get(void);
 unsigned int mv_ddr_if_bus_width_get(void);
 unsigned int mv_ddr_cs_num_get(void);
 int mv_ddr_is_ecc_ena(void);
+int mv_ddr_ck_delay_get(void);
 unsigned long long mv_ddr_mem_sz_per_cs_get(void);
 unsigned long long mv_ddr_mem_sz_get(void);
 unsigned int mv_ddr_rtt_nom_get(void);
-- 
2.25.0



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