[PATCH v2 01/16] clk: k210: Fix PLLs not being enabled
Rick Chen
rickchen36 at gmail.com
Tue Nov 3 08:08:58 CET 2020
> After starting or setting the rate of a PLL, the enable bit must be set.
>
> This fixes a bug where the AI ram would not be accessible, because it
> requires PLL1 to be running.
>
> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
> ---
>
> (no changes since v1)
>
> drivers/clk/kendryte/pll.c | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rick Chen <rick at andestech.com>
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