[PATCH 1/4] arm: cache-cp15: add error when region is not aligned on MMU_SECTION

[Patrick Delaunay]

Since commit d877f8fd0f09 ("arm: provide a function for boards init code to
modify MMU virtual-physical map"), the mmu_set_region_dcache_behaviour_phys
parameter need to be aligned on MMU_SECTION_SIZE to avoid unpredictable
behavior (alignment was done previously done in the function
mmu_set_region_dcache_behaviour_phys).

This patch raised a error when this alignment is not respected.
Even if this function is called so early, this  message can be printed
when CONFIG_DEBUG_UART is activated or can be treated later with
CONFIG_PRE_CONSOLE_BUFFER.

CC: Marek Szyprowski <m.szyprowski at samsung.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
---
See complete analysis in comment #3 of patch [1]
For example of workaround patch already sent see [2]

[1] http://patchwork.ozlabs.org/project/uboot/patch/20200603124345.18595-4-m.szyprowski@samsung.com/#2490603
[2] stm32mp1: mmu_set_region_dcache_behaviour
    http://patchwork.ozlabs.org/project/uboot/patch/20200724092151.21335-1-patrick.delaunay@st.com/


 arch/arm/lib/cache-cp15.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index abd81d21c7..e2efe6f244 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -68,6 +68,11 @@ void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys,
 	unsigned long startpt, stoppt;
 	unsigned long upto, end;
 
+	if (!IS_ALIGNED(start, MMU_SECTION_SIZE) ||
+	    !IS_ALIGNED(size, MMU_SECTION_SIZE))
+		log_err("%s: start=%p or size =%zx is not aligned with MMU_SECTION_SIZE (%x)\n",
+			__func__, (void *)start, size, MMU_SECTION_SIZE);
+
 	/* div by 2 before start + size to avoid phys_addr_t overflow */
 	end = ALIGN((start / 2) + (size / 2), MMU_SECTION_SIZE / 2)
 	      >> (MMU_SECTION_SHIFT - 1);
-- 
2.17.1