[PATCH 3/4] arm: cache-cp15: correct debug trace

[Patrick Delaunay]

Display in the debug trace the needed information, start and phys
address (and not the &start) in mmu_set_region_dcache_behaviour_phys,
before shift operation by MMU_SECTION_SHIFT.

For example, a debug trace for STM32MP157C-EV1 is:
mmu_set_region_dcache_behaviour_phys: start=c0000000, phys=c0000000,\
 size=10000000, option=0x1e

Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
---

 arch/arm/lib/cache-cp15.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 6f154de4c3..2b94e62894 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -80,13 +80,14 @@ void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys,
 		log_err("%s: start=%p or size =%zx is not aligned with MMU_SECTION_SIZE (%x)\n",
 			__func__, (void *)start, size, MMU_SECTION_SIZE);
 
+	debug("%s: start=%p, phys=%p, size=%zx, option=0x" OPTIONF "\n",
+	      __func__, (void *)start, (void *)phys, size, option);
+
 	/* div by 2 before start + size to avoid phys_addr_t overflow */
 	end = ALIGN((start / 2) + (size / 2), MMU_SECTION_SIZE / 2)
 	      >> (MMU_SECTION_SHIFT - 1);
 	start = start >> MMU_SECTION_SHIFT;
 
-	debug("%s: start=%pa, size=%zu, option=0x" OPTIONF "\n",
-	      __func__, &start, size, option);
 
 	for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE)
 		set_section_phys(upto, phys, option);
-- 
2.17.1