[PATCH v1 1/4] ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1
Patrice Chotard
patrice.chotard at st.com
Fri Nov 6 08:11:57 CET 2020
Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"),
skeleton.dtsi file is no more included.
This synchronization is needed to avoid to get 2 memory node
in DTB file if, in DTS file, memory node is declared with the correct
syntax as following:
memory at 90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Then in DTB, we will have the 2 memory nodes, which is incorrect and
cause misbehavior during DT parsing by U-boot:
memory {
device_type = "memory";
reg = <0x00 0x00>;
};
memory at 90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1.
When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize()
API, first above memory node is found (with reg = <0x00 0x00>), so
gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and
gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot.
Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
---
arch/arm/dts/armv7-m.dtsi | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/dts/armv7-m.dtsi b/arch/arm/dts/armv7-m.dtsi
index 31349da75a..26f5443d85 100644
--- a/arch/arm/dts/armv7-m.dtsi
+++ b/arch/arm/dts/armv7-m.dtsi
@@ -1,5 +1,4 @@
-#include "skeleton.dtsi"
-
+// SPDX-License-Identifier: GPL-2.0
/ {
nvic: interrupt-controller at e000e100 {
compatible = "arm,armv7m-nvic";
@@ -22,4 +21,3 @@
ranges;
};
};
-
--
2.17.1
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