[PATCH v4 07/27] rockchip: Enable building a SPI ROM image on bob
Hugh Cole-Baker
sigmaris at gmail.com
Sun Nov 8 15:05:20 CET 2020
Hi Simon,
> On 3 Nov 2020, at 15:11, Simon Glass <sjg at chromium.org> wrote:
>
> Hi Hugh,
>
> On Wed, 14 Oct 2020 at 12:37, Hugh Cole-Baker <sigmaris at gmail.com> wrote:
>>
>> Hello,
>>> On 11 Oct 2020, at 16:39, Emmanuel Vadot <manu at bidouilliste.com> wrote:
>>>
>>>
>>> Hi Simon,
>>>
>>> On Sun, 19 Jul 2020 13:55:58 -0600
>>> Simon Glass <sjg at chromium.org> wrote:
>>>
>>>> Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot
>>>> produces a ROM for bob.
>>>>
>>>> Signed-off-by: Simon Glass <sjg at chromium.org>
>>>> ---
>>>>
>>>> Changes in v4:
>>>> - Use CONFIG_ROCKCHIP_SPI_IMAGE to select the image
>>>>
>>>> arch/arm/dts/rk3399-gru-u-boot.dtsi | 4 ++++
>>>> arch/arm/dts/rk3399-gru.dtsi | 2 +-
>>>> arch/arm/dts/rk3399-u-boot.dtsi | 27 +++++++++++++++++++++++++++
>>>> arch/arm/mach-rockchip/rk3399/Kconfig | 2 ++
>>>> 4 files changed, 34 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
>>>> index 7bddc3acdb..390ac2bb5a 100644
>>>> --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
>>>> +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
>>>> @@ -4,3 +4,7 @@
>>>> */
>>>>
>>>> #include "rk3399-u-boot.dtsi"
>>>> +
>>>> +&spi_flash {
>>>> + u-boot,dm-pre-reloc;
>>>> +};
>>>> diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
>>>> index 7ac88392f2..f9c5bb607b 100644
>>>> --- a/arch/arm/dts/rk3399-gru.dtsi
>>>> +++ b/arch/arm/dts/rk3399-gru.dtsi
>>>> @@ -537,7 +537,7 @@ ap_i2c_audio: &i2c8 {
>>>> pinctrl-names = "default", "sleep";
>>>> pinctrl-1 = <&spi1_sleep>;
>>>>
>>>> - spiflash at 0 {
>>>> + spi_flash: spiflash at 0 {
>>>> compatible = "jedec,spi-nor";
>>>> reg = <0>;
>>>>
>>>> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
>>>> index 8237782408..ecd230c720 100644
>>>> --- a/arch/arm/dts/rk3399-u-boot.dtsi
>>>> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
>>>> @@ -4,11 +4,14 @@
>>>> */
>>>> #define USB_CLASS_HUB 9
>>>>
>>>> +#include "rockchip-u-boot.dtsi"
>>>> +
>>>> / {
>>>> aliases {
>>>> mmc0 = &sdhci;
>>>> mmc1 = &sdmmc;
>>>> pci0 = &pcie0;
>>>> + spi1 = &spi1;
>>>
>>> I don't really understand why but this added alias break spi flash
>>> detection on rockpro64.
>>> Removing it make it work again.
>>
>> I've noticed the same problem - rockpro64 already had an alias
>>
>> spi0 = &spi1;
>>
>> so after this change there are spi0 and spi1 aliases pointing to &spi1.
>> In U-Boot proper, that seems to cause the SPI flash to appear on bus 1
>> rather than the former bus 0, e.g. sf probe 1:0 works but sf probe 0:0
>> doesn't.
>>
>> So I tried removing the spi0 alias and setting CONFIG_SF_DEFAULT_BUS=1
>> which fixed the flash detection in U-Boot proper, but now the SPL can't
>> load U-Boot from SPI flash - it fails with an "Invalid bus 1 (err=-19)"
>> It seems like SPL doesn't pay attention to the spi1 alias in the same
>> way that U-boot proper does, I haven't yet figured out why.
>>
>
> Could this be CONFIG_SPL_DM_SEQ_ALIAS ?
>
> Regards,
> Simon
Thanks for the pointer, that was the last missing piece to get SPI boot
working again on my board. I've just submitted a patch with the fix.
Regards,
Hugh
More information about the U-Boot
mailing list