[RESEND v2 00/22] Add Intel Diamond Mesa SoC support
Siew Chin Lim
elly.siew.chin.lim at intel.com
Tue Nov 10 07:44:17 CET 2020
This is the 2nd version of patchset add Intel Diamond Mesa SoC[1] support.
Intel Diamond Mesa SoC is with a 64-bit quad core ARM Cortex-A53 MPCore
hard processor system (HPS). New IPs in Diamond Mesa are clock manager
and DDR subsystem, other IPs have minor changes compared to Agilex.
Patch status:
Have changes: Patch 20, 22
Other patches unchanged.
Detail changelog can find in commit message.
v1->v2:
--------
Patch 20:
- Include binman node device tree object (socfpga_soc64_fit-u-boot.dtsi_ in socfpga_dm-u-boot.dtsi
Patch 22:
- Add "CONFIG_USE_SPL_FIT_GENERATE is not set" to socfpga_dm_atf_defconfig. Use binman to generate
FIT image instead of local script.
History:
--------
[v1]: https://patchwork.ozlabs.org/project/uboot/cover/20200922094930.100855-1-elly.siew.chin.lim@intel.com/
These patchsets have dependency on:
--------
Enable ARM Trusted Firmware for U-Boot
https://patchwork.ozlabs.org/project/uboot/cover/20201015122955.10259-1-elly.siew.chin.lim@intel.com/
Note:
--------
[1]: https://www.intel.com/content/www/us/en/products/programmable/asic/easic-devices/diamond-mesa-soc-devices.html
Siew Chin Lim (22):
arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
arm: socfpga: dm: Add base address for Intel Diamond Mesa
arm: socfpga: dm: Add firewall support for Agilex and Diamond Mesa
arm: socfpga: Rename Stratix10 and Agilex handoff common macros
arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c
arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c
arm: socfpga: Rearrange sequence of macros in handoff_soc64.h
arm: socfpga: Restructure Stratix10 and Agilex handoff code
arm: socfpga: Add handoff data support for Diamond Mesa
drivers: clk: dm: Add clock driver for Diamond Mesa
arm: socfpga: dm: Get clock manager base address for Diamond Mesa
drivers: clk: dm: Add memory clock driver for Diamond Mesa
arm: socfpga: Move Stratix10 and Agilex clock manager common code
arm: socfpga: Changed to store QSPI reference clock in kHz
arm: socfpga: dm: Add clock manager for Diamond Mesa
ddr: altera: dm: Add SDRAM driver for Diamond Mesa
arm: socfpga: Move Stratix10 and Agilex SPL common code
arm: socfpga: dm: Add SPL for Diamond Mesa
board: intel: dm: Add socdk board support for Diamond Mesa
arm: dts: dm: Add base dtsi and devkit dts for Diamond Mesa
configs: dm: Add Diamond Mesa CONFIGs
arm: socfpga: dm: Enable Intel Diamond Mesa build
arch/arm/Kconfig | 6 +-
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_dm-u-boot.dtsi | 102 ++
arch/arm/dts/socfpga_dm.dtsi | 640 ++++++++++
arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi | 50 +
arch/arm/dts/socfpga_dm_socdk.dts | 144 +++
arch/arm/mach-socfpga/Kconfig | 24 +
arch/arm/mach-socfpga/Makefile | 33 +-
arch/arm/mach-socfpga/clock_manager.c | 11 +
arch/arm/mach-socfpga/clock_manager_agilex.c | 6 -
.../{clock_manager_agilex.c => clock_manager_dm.c} | 32 +-
arch/arm/mach-socfpga/clock_manager_s10.c | 8 +-
arch/arm/mach-socfpga/firewall.c | 10 +
arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 3 +-
arch/arm/mach-socfpga/include/mach/clock_manager.h | 6 +
.../mach-socfpga/include/mach/clock_manager_dm.h | 14 +
.../mach-socfpga/include/mach/clock_manager_s10.h | 1 -
arch/arm/mach-socfpga/include/mach/firewall.h | 7 +
arch/arm/mach-socfpga/include/mach/handoff_s10.h | 39 -
arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 81 ++
arch/arm/mach-socfpga/include/mach/reset_manager.h | 3 +-
.../arm/mach-socfpga/include/mach/system_manager.h | 3 +-
.../include/mach/system_manager_soc64.h | 20 +-
arch/arm/mach-socfpga/mailbox_s10.c | 28 +-
arch/arm/mach-socfpga/misc.c | 3 +
arch/arm/mach-socfpga/spl_agilex.c | 16 -
arch/arm/mach-socfpga/{spl_agilex.c => spl_dm.c} | 37 +-
arch/arm/mach-socfpga/spl_s10.c | 17 -
arch/arm/mach-socfpga/spl_soc64.c | 26 +
...system_manager_s10.c => system_manager_soc64.c} | 53 +-
arch/arm/mach-socfpga/wrap_handoff_soc64.c | 113 ++
arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 -
...ap_pll_config_s10.c => wrap_pll_config_soc64.c} | 18 +-
board/intel/dm-socdk/MAINTAINERS | 7 +
board/intel/dm-socdk/Makefile | 7 +
board/intel/dm-socdk/socfpga.c | 7 +
configs/socfpga_dm_atf_defconfig | 76 ++
configs/socfpga_dm_defconfig | 69 ++
drivers/clk/altera/Makefile | 3 +-
drivers/clk/altera/clk-dm.c | 504 ++++++++
drivers/clk/altera/clk-dm.h | 213 ++++
drivers/clk/altera/clk-mem-dm.c | 135 ++
drivers/clk/altera/clk-mem-dm.h | 80 ++
drivers/ddr/altera/Kconfig | 6 +-
drivers/ddr/altera/Makefile | 1 +
drivers/ddr/altera/sdram_dm.c | 1294 ++++++++++++++++++++
drivers/ddr/altera/sdram_soc64.c | 6 +
drivers/fpga/Kconfig | 2 +-
drivers/sysreset/Kconfig | 2 +-
include/configs/socfpga_dm_socdk.h | 46 +
include/configs/socfpga_soc64_common.h | 4 +-
include/dt-bindings/clock/dm-clock.h | 71 ++
52 files changed, 3902 insertions(+), 242 deletions(-)
create mode 100644 arch/arm/dts/socfpga_dm-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_dm.dtsi
create mode 100644 arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_dm_socdk.dts
copy arch/arm/mach-socfpga/{clock_manager_agilex.c => clock_manager_dm.c} (59%)
create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_dm.h
delete mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h
create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_soc64.h
copy arch/arm/mach-socfpga/{spl_agilex.c => spl_dm.c} (77%)
create mode 100644 arch/arm/mach-socfpga/spl_soc64.c
rename arch/arm/mach-socfpga/{system_manager_s10.c => system_manager_soc64.c} (55%)
create mode 100644 arch/arm/mach-socfpga/wrap_handoff_soc64.c
delete mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c
rename arch/arm/mach-socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c} (71%)
create mode 100644 board/intel/dm-socdk/MAINTAINERS
create mode 100644 board/intel/dm-socdk/Makefile
create mode 100644 board/intel/dm-socdk/socfpga.c
create mode 100644 configs/socfpga_dm_atf_defconfig
create mode 100644 configs/socfpga_dm_defconfig
create mode 100644 drivers/clk/altera/clk-dm.c
create mode 100644 drivers/clk/altera/clk-dm.h
create mode 100644 drivers/clk/altera/clk-mem-dm.c
create mode 100644 drivers/clk/altera/clk-mem-dm.h
create mode 100644 drivers/ddr/altera/sdram_dm.c
create mode 100644 include/configs/socfpga_dm_socdk.h
create mode 100644 include/dt-bindings/clock/dm-clock.h
--
2.13.0
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