[PATCH 00/26] TI J7 SoC HSM Rearch support series

[Tero Kristo]

Hello,

On TI J7 SoCs the device manager firmware is now split into two
portions instead of the existing one which supported all services via a
single firmware image running on DMSC core. Now, the existing DMSC core
is dedicated for secure services only, and the PM and RM functionality
is moved under a separate firmware image running on MCU R5 core. This
is completely transparent for the firmware users, as the existing
messaging mechanism (TI-SCI) routes everything to proper destination,
except for anything that runs on MCU R5, and in our case it happens
to be R5 SPL bootloader.

To support the firmware split, R5 SPL implementation must be changed in
a way that it implements its own PM features, as these are needed during
boot time. This series thus implements a couple of new drivers, PLL
clock driver for the SoCs, and also a generic clock provider driver which
is used to attach device drivers to proper clock entries. Also
implemented is a power domain driver to power up/down IP blocks. R5
SPL bootloader also now needs to load and start the new DM firmware image
and this is handled in the series.

There are also a number of fixes attached to the series for fixing
issues noticed while implementing the new drivers, mostly on the generic
clock drivers side. I decided to keep the series as a single chunk for
now, as it probably makes it easier to see why certain things are done.
Let me know if you want me to split this series somehow.

-Tero


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