[v3 09/16] arm: socfpga: soc64: Add ATF support for Reset Manager driver

[Tan, Ley Foon]

> -----Original Message-----
> From: Lim, Elly Siew Chin <elly.siew.chin.lim at intel.com>
> Sent: Thursday, October 15, 2020 8:30 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Tan, Ley Foon
> <ley.foon.tan at intel.com>; See, Chin Liang <chin.liang.see at intel.com>;
> Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at intel.com>; Westergreen, Dalon
> <dalon.westergreen at intel.com>; Simon Glass <sjg at chromium.org>; Ang,
> Chee Hong <chee.hong.ang at intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim at intel.com>
> Subject: [v3 09/16] arm: socfpga: soc64: Add ATF support for Reset Manager
> driver
> 
> From: Chee Hong Ang <chee.hong.ang at intel.com>
> 
> In non-secure mode (EL2), Reset Manager driver calls the SMC/PSCI service
> provided by ATF to enable/disable the SOCFPGA bridges.
> 
> Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim at intel.com>
> ---
>  arch/arm/mach-socfpga/reset_manager_s10.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c
> b/arch/arm/mach-socfpga/reset_manager_s10.c
> index 3746e6a60c..af8f2c0873 100644
> --- a/arch/arm/mach-socfpga/reset_manager_s10.c
> +++ b/arch/arm/mach-socfpga/reset_manager_s10.c
> @@ -5,11 +5,14 @@
>   */
> 

Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>