[PATCH 3/3] riscv: Complete efi header for RV32/64

[Leo Liang]

Date: Mon, 16 Nov 2020 17:07:41 +0800
From: Leo Yu-Chi Liang <ycliang at andestech.com>
Subject: [PATCH 3/3] riscv: Complete efi header for RV32/64

This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Add fields to complete Optional Header "Data Directories" specified in the document.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang at andestech.com>
Cc: rick at andestech.com
Cc: alankao at andestech.com
Cc: atish.patra at wdc.com
Cc: xypron.glpk at gmx.de
Cc: bmeng.cn at gmail.com
---
 arch/riscv/lib/crt0_riscv_efi.S | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S
index 48ff89553b..e7c4d99c21 100644
--- a/arch/riscv/lib/crt0_riscv_efi.S
+++ b/arch/riscv/lib/crt0_riscv_efi.S
@@ -107,6 +107,16 @@ extra_header_fields:
 	.quad	0				/* ExceptionTable */
 	.quad	0				/* CertificationTable */
 	.quad	0				/* BaseRelocationTable */
+	.quad	0				/* Debug */
+	.quad	0				/* Architecture */
+	.quad	0				/* Global Ptr */
+	.quad	0				/* TLS Table */
+	.quad	0				/* Load Config Table */
+	.quad	0				/* Bound Import */
+	.quad	0				/* IAT */
+	.quad	0				/* Delay Import Descriptor */
+	.quad	0				/* CLR Runtime Header */
+	.quad	0				/* Reserved */
 
 	/* Section table */
 section_table:
-- 
2.17.0