[PATCH v2 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze

Michal Simek monstr at monstr.eu
Wed Dec 1 11:10:27 CET 2021

On 11/30/21 17:33, Ovidiu Panait wrote:
> Xilinx board_fdt_blob_setup() implementation makes use of
> XILINX_OF_BOARD_DTB_ADDR Kconfig option, but no default value is currently
> defined for microblaze. Add one so that microblaze could also be configured
> Signed-off-by: Ovidiu Panait <ovidiu.panait at windriver.com>
> ---
> (no changes since v1)
>   board/xilinx/Kconfig | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
> index 64507b5d84..9e69166903 100644
> --- a/board/xilinx/Kconfig
> +++ b/board/xilinx/Kconfig
> @@ -43,7 +43,7 @@ endif
>   	hex "Default DTB pickup address"
>   	default 0x1000 if ARCH_VERSAL
> -	default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
> +	default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP || MICROBLAZE
>   	depends on OF_BOARD || OF_SEPARATE
>   	help
>   	  Offset in the memory where the board configuration DTB is placed.

First of all I applied patches 2-10.

And let's have short discussion about this default address. 1MB is quite 
high for DTB. In standard system when you have brams you likely don't 
have more 1MB. That's why this default is not the best.
I didn't use microblaze spl for a while but from build it has ~30kB. Not 
sure where I did setup stack, early malloc area but I think having place 
around 32kB/64kB would be more reasonable default because you will have 
brams there.
And having dtb in bram is likely better because it can be the part of 
Can you please elaborate a little bit why you choose 1M for microblaze?


Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

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