[PATCH v2 3/4] rockchip: bob: Enable more configs

[Kever Yang]

On 2021/12/14 上午6:15, Alper Nebi Yasak wrote:
> This patch enables some configs that should be working on the Bob board,
> based on what is observed to work on the Kevin board.
>
> The Bob board uses an Embedded DisplayPort panel compatible with the
> simple panel and Rockchip eDP drivers. Its backlight is controlled by
> the Chromium OS Embedded Controller Pulse Width Modulator. Enable these
> for the board.
>
> Also set VIDEO_ROCKCHIP_MAX_{XRES,YRES} to 1280x800, the resolution of
> its panel. This had to be done for the Kevin board, but it's untested if
> this is actually necessary for Bob.
>
> The Rockchip video driver needs to assert/deassert some resets, so also
> enable the reset controller. RESET_ROCKCHIP defaults to y for this board
> when DM_RESET=y, so it's enough to set that.
>
> The Bob board has two USB 3.0 Type-C ports and one USB 2.0 Type-A port
> on its right side. Enable the configs relevant to USB devices so these
> can be used. This is despite a known issue with RK3399 boards where USB
> de-init causes a hang, as there is a known workaround.
>
> Some other rk3399-based devices enable support for the SoC's random
> number generator in commit a475bef5340c ("configs: rk3399: enable rng on
> firefly/rock960/rockpro64"), as it can provide a KASLR seed when booting
> using UEFI. Enable it for Bob as well.
>
> The default misc_init_r() for Rockchip boards sets cpuid and ethernet
> MAC address based on e-fuse block. A previous patch extends this on Gru
> boards to set registers related to SoC IO domains as is necessary on
> these boards. Enable this function and configs for it on Bob.
>
> The eMMC on this board is capable of running at a HS400 Enhanced Strobe
> configuration, and the microSD slot at Ultra High Speed SDR104. Enable
> the configs for these as the hardware supports these modes. There are
> problems causing the devices to run at lower speeds, but these configs
> are enabled in hope that these will be solved later. Enabling ADMA
> currently makes the eMMC stop working, so it is kept disabled.
>
> The microSD card slot on this board (and others based on Gru) is
> connected to a GPIO controlled regulator (ppvar-sd-card-io), which must
> be operable by U-Boot. Enable the relevant config option to allow this.
>
> Bob boards also use the Winbond W25Q64DW SPI flash chip, enable support
> for Winbond SPI flash chips in the board config so U-Boot can boot with
> this chip.
>
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak at gmail.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>
> (no changes since v1)
>
>   configs/chromebook_bob_defconfig | 27 ++++++++++++++++++++++++++-
>   include/configs/gru.h            |  3 +++
>   2 files changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
> index fe938c659172..048fa8e0c043 100644
> --- a/configs/chromebook_bob_defconfig
> +++ b/configs/chromebook_bob_defconfig
> @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
>   # CONFIG_DISPLAY_CPUINFO is not set
>   CONFIG_DISPLAY_BOARDINFO_LATE=y
>   CONFIG_BOARD_EARLY_INIT_R=y
> +CONFIG_MISC_INIT_R=y
>   CONFIG_BLOBLIST=y
>   CONFIG_BLOBLIST_SIZE=0x1000
>   CONFIG_BLOBLIST_ADDR=0x100000
> @@ -52,26 +53,40 @@ CONFIG_ROCKCHIP_GPIO=y
>   CONFIG_I2C_CROS_EC_TUNNEL=y
>   CONFIG_SYS_I2C_ROCKCHIP=y
>   CONFIG_I2C_MUX=y
> -CONFIG_DM_KEYBOARD=y
>   CONFIG_CROS_EC_KEYB=y
> +CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
>   CONFIG_CROS_EC=y
>   CONFIG_CROS_EC_SPI=y
>   CONFIG_PWRSEQ=y
>   CONFIG_MMC_PWRSEQ=y
> +CONFIG_MMC_IO_VOLTAGE=y
> +CONFIG_MMC_UHS_SUPPORT=y
> +CONFIG_MMC_HS400_ES_SUPPORT=y
> +CONFIG_MMC_HS400_SUPPORT=y
>   CONFIG_MMC_DW=y
>   CONFIG_MMC_DW_ROCKCHIP=y
>   CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
>   CONFIG_MMC_SDHCI_ROCKCHIP=y
>   CONFIG_SF_DEFAULT_BUS=1
>   CONFIG_SF_DEFAULT_SPEED=20000000
>   CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_WINBOND=y
>   CONFIG_DM_ETH=y
>   CONFIG_ETH_DESIGNWARE=y
>   CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_TYPEC=y
>   CONFIG_PMIC_RK8XX=y
>   CONFIG_REGULATOR_PWM=y
> +CONFIG_DM_REGULATOR_GPIO=y
>   CONFIG_REGULATOR_RK8XX=y
> +CONFIG_PWM_CROS_EC=y
>   CONFIG_PWM_ROCKCHIP=y
> +CONFIG_DM_RESET=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_ROCKCHIP=y
>   CONFIG_DEBUG_UART_SHIFT=2
>   CONFIG_ROCKCHIP_SPI=y
>   CONFIG_SYSRESET=y
> @@ -80,11 +95,21 @@ CONFIG_USB_XHCI_HCD=y
>   CONFIG_USB_XHCI_DWC3=y
>   CONFIG_USB_EHCI_HCD=y
>   CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_GENERIC=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_KEYBOARD=y
>   CONFIG_USB_HOST_ETHER=y
>   CONFIG_USB_ETHER_ASIX=y
>   CONFIG_USB_ETHER_ASIX88179=y
>   CONFIG_USB_ETHER_MCS7830=y
>   CONFIG_USB_ETHER_RTL8152=y
>   CONFIG_USB_ETHER_SMSC95XX=y
> +CONFIG_DM_VIDEO=y
> +CONFIG_DISPLAY=y
> +CONFIG_VIDEO_ROCKCHIP=y
> +CONFIG_VIDEO_ROCKCHIP_MAX_XRES=1280
> +CONFIG_VIDEO_ROCKCHIP_MAX_YRES=800
> +CONFIG_DISPLAY_ROCKCHIP_EDP=y
>   CONFIG_CMD_DHRYSTONE=y
>   CONFIG_ERRNO_STR=y
> diff --git a/include/configs/gru.h b/include/configs/gru.h
> index be2dc79968c0..b1084bb21d4d 100644
> --- a/include/configs/gru.h
> +++ b/include/configs/gru.h
> @@ -13,4 +13,7 @@
>   
>   #include <configs/rk3399_common.h>
>   
> +#define CONFIG_USB_OHCI_NEW
> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
> +
>   #endif