[PATCH v5 0/6] fpga: zynqmp: Adding support of loading authenticated images

[Simon Glass]

Hi,

On Tue, 14 Dec 2021 at 07:48, Oleksandr Suvorov
<oleksandr.suvorov at foundries.io> wrote:
>
>
> This patchset introduces support for the authenticated FPGA images
> on ZynqMP boards, besides that introducing common way to pass the
> compatible property to any fpga driver.
>
> It bases on the initial work by Jorge Ramirez-Ortiz <jorge at foundries.io>
> https://patchwork.ozlabs.org/project/uboot/patch/20211015091506.2602-1-jorge@foundries.io/
> https://patchwork.ozlabs.org/project/uboot/patch/20211005111324.19749-3-jorge@foundries.io/
>
> Changes in v5:
> - replace ifdef with if() where it's possible
>
> Changes in v4:
> - change interface to xilinx_desc->operations->open() callback.
> - fix a bug from previous version of the patchset in dereferencing
>   of a parent fpga_desc structure.
>
> Changes in v3:
> - remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
> - fix mixing definitions/declarations.
> - replace strcmp() calls with more secure strncmp().
> - document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
> - fix code style by check-patch recommendations.
>
> Changes in v2:
> - add function fit_fpga_load() to simplify calls of fpga_load()
>   from contexts without a compatible attribute.
> - move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
> - prepare for passing a "compatible" FDT property to any fpga driver.
>
> Oleksandr Suvorov (6):
>   fpga: add option for loading FPGA secure bitstreams
>   fpga: add fit_fpga_load function
>   fpga: xilinx: pass an address of xilinx_desc in fpga_desc
>   fpga: xilinx: add missed identifier names
>   fpga: xilinx: pass xilinx_desc pointer address into load() ops
>   fpga: zynqmp: support loading authenticated images
>
>  boot/Kconfig                          |  4 +--
>  cmd/Kconfig                           |  3 +-
>  common/spl/spl_fit.c                  |  6 ++--
>  doc/uImage.FIT/source_file_format.txt |  5 +++-
>  drivers/fpga/Kconfig                  | 14 +++++++++
>  drivers/fpga/fpga.c                   | 41 ++++++++++++++++++++-------
>  drivers/fpga/spartan2.c               |  3 +-
>  drivers/fpga/spartan3.c               |  3 +-
>  drivers/fpga/versalpl.c               |  2 +-
>  drivers/fpga/virtex2.c                |  3 +-
>  drivers/fpga/xilinx.c                 |  8 ++++--
>  drivers/fpga/zynqmppl.c               | 30 +++++++++++++++++---
>  drivers/fpga/zynqpl.c                 |  3 +-
>  include/fpga.h                        |  4 +++
>  include/xilinx.h                      | 12 ++++----
>  15 files changed, 106 insertions(+), 35 deletions(-)
>

I think we should hold off until we have FPGA tests. We have been
waiting long enough and this just adds more untested code.

Regards,
Simon