[PATCH] armv8: update SVR_SOC_VER to mask CAN_FD and security bit for LX2 products

Wasim Khan wasim.khan at nxp.com
Fri Jan 8 14:08:01 CET 2021


Multiple product varients exists based on CAN-FD and security
bit in SVR.
Currenly SVR_SOC_VER mask only security bit. Update SVR_SOC_VER
to mask CAN_FD and security bit for LX2 products.

Signed-off-by: Wasim Khan <wasim.khan at nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/soc.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index b24f38cac9..887954eaa5 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017-2020 NXP
+ * Copyright 2017-2021 NXP
  * Copyright 2015 Freescale Semiconductor
  */
 
@@ -113,10 +113,13 @@ enum boot_src get_boot_src(void);
 #define SVR_MAJ(svr)		(((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)		(((svr) >> 0) & 0xf)
 #define SVR_REV(svr)		(((svr) >> 0) & 0xff)
-#define SVR_SOC_VER(svr)	(((svr) >> 8) & SVR_WO_E)
 #define IS_E_PROCESSOR(svr)	(!((svr >> 8) & 0x1))
 #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
 #define IS_C_PROCESSOR(svr)	(!((svr >> 12) & 0x1))
+#define SVR_WO_CE		0xFFFFEE
+#define SVR_SOC_VER(svr)	(((svr) >> 8) & SVR_WO_CE)
+#else
+#define SVR_SOC_VER(svr)	(((svr) >> 8) & SVR_WO_E)
 #endif
 #ifdef CONFIG_ARCH_LS1028A
 #define IS_MULTIMEDIA_EN(svr)	(!((svr >> 10) & 0x1))
-- 
2.25.1



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