[PATCH v2 10/21] sunxi: add support for R_I2C on H616
Jernej Skrabec
jernej.skrabec at siol.net
Mon Jan 11 21:11:42 CET 2021
This port is needed for communication with PMIC. SPL uses it to set DRAM
voltage on H616 boards.
Reviewed-by: Samuel Holland <samuel at sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec at siol.net>
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
board/sunxi/board.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index cdb7dbd5b8e5..de77bf638e21 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -220,6 +220,7 @@ enum sunxi_gpio_number {
#define SUN8I_A23_GPL_R_TWI 3
#define SUN8I_GPL_R_UART 2
#define SUN50I_GPL_R_TWI 2
+#define SUN50I_H616_GPL_R_TWI 3
#define SUN9I_GPN_R_RSB 3
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 40fdd5da0477..14d31c719ece 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -196,6 +196,10 @@ void i2c_init_board(void)
clock_twi_onoff(5, 1);
sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI);
sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI);
+#elif CONFIG_MACH_SUN50I_H616
+ clock_twi_onoff(5, 1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN50I_H616_GPL_R_TWI);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN50I_H616_GPL_R_TWI);
#else
clock_twi_onoff(5, 1);
sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
--
2.30.0
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