[PATCH 6/7] spi: zynqmp_gqspi: Add tap delays for Versal qspi

[Ashok Reddy Soma]

This patch adds tap delays for qspi in Versal platform.
Use IS_ENABLED() to address for ZynqMP and Versal and re-align the
tapdelays code.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
---

 drivers/spi/zynqmp_gqspi.c | 54 ++++++++++++++++++++++++++------------
 1 file changed, 37 insertions(+), 17 deletions(-)

diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index f50a7304ea..e9726912b7 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -102,8 +102,10 @@
 #define TAP_DLY_BYPASS_LQSPI_RX_VALUE  0x1
 #define TAP_DLY_BYPASS_LQSPI_RX_SHIFT  2
 #define GQSPI_DATA_DLY_ADJ_OFST                0x000001F8
-#define IOU_TAPDLY_BYPASS_OFST         0xFF180390
+#define IOU_TAPDLY_BYPASS_OFST !IS_ENABLED(CONFIG_ARCH_VERSAL) ? \
+                               0xFF180390 : 0xF103003C
 #define GQSPI_LPBK_DLY_ADJ_LPBK_MASK   0x00000020
+#define GQSPI_FREQ_37_5MHZ             37500000
 #define GQSPI_FREQ_40MHZ               40000000
 #define GQSPI_FREQ_100MHZ              100000000
 #define GQSPI_FREQ_150MHZ              150000000
@@ -296,23 +298,41 @@ void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval)
        debug("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n",
              __func__, reqhz, clk_rate, baudrateval);

-       if (reqhz <= GQSPI_FREQ_40MHZ) {
-               tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE <<
-                               TAP_DLY_BYPASS_LQSPI_RX_SHIFT;
-       } else if (reqhz <= GQSPI_FREQ_100MHZ) {
-               tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE <<
-                               TAP_DLY_BYPASS_LQSPI_RX_SHIFT;
-               lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK;
-               datadlyadj = (GQSPI_USE_DATA_DLY << GQSPI_USE_DATA_DLY_SHIFT) |
-                             (GQSPI_DATA_DLY_ADJ_VALUE <<
-                              GQSPI_DATA_DLY_ADJ_SHIFT);
-       } else if (reqhz <= GQSPI_FREQ_150MHZ) {
-               lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK |
-                             GQSPI_LPBK_DLY_ADJ_DLY_0;
+       if (!IS_ENABLED(CONFIG_ARCH_VERSAL)) {
+               if (reqhz <= GQSPI_FREQ_40MHZ) {
+                       tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE <<
+                                       TAP_DLY_BYPASS_LQSPI_RX_SHIFT;
+               } else if (reqhz <= GQSPI_FREQ_100MHZ) {
+                       tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE <<
+                                       TAP_DLY_BYPASS_LQSPI_RX_SHIFT;
+                       lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK;
+                       datadlyadj = (GQSPI_USE_DATA_DLY <<
+                                     GQSPI_USE_DATA_DLY_SHIFT) |
+                                      (GQSPI_DATA_DLY_ADJ_VALUE <<
+                                       GQSPI_DATA_DLY_ADJ_SHIFT);
+               } else if (reqhz <= GQSPI_FREQ_150MHZ) {
+                       lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK |
+                                     GQSPI_LPBK_DLY_ADJ_DLY_0;
+               }
+               zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST,
+                                 IOU_TAPDLY_BYPASS_MASK, tapdlybypass);
+       } else {
+               if (reqhz <= GQSPI_FREQ_37_5MHZ) {
+                       tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE <<
+                                       TAP_DLY_BYPASS_LQSPI_RX_SHIFT;
+               } else if (reqhz <= GQSPI_FREQ_100MHZ) {
+                       tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE <<
+                                       TAP_DLY_BYPASS_LQSPI_RX_SHIFT;
+                       lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK;
+                       datadlyadj = GQSPI_USE_DATA_DLY <<
+                                     GQSPI_USE_DATA_DLY_SHIFT;
+               } else if (reqhz <= GQSPI_FREQ_150MHZ) {
+                       lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK |
+                                     (GQSPI_LPBK_DLY_ADJ_DLY_1 <<
+                                      GQSPI_LPBK_DLY_ADJ_DLY_1_SHIFT);
+               }
+               writel(tapdlybypass, IOU_TAPDLY_BYPASS_OFST);
        }
-
-       zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST, IOU_TAPDLY_BYPASS_MASK,
-                         tapdlybypass);
        writel(lpbkdlyadj, &regs->lpbkdly);
        writel(datadlyadj, &regs->gqspidlyadj);
 }
--
2.17.1

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