[PATCH 1/2] video: seps525: Align driver with latest treewide changes
Michal Simek
monstr at monstr.eu
Wed Jan 20 08:48:20 CET 2021
čt 7. 1. 2021 v 14:26 odesílatel Michal Simek <michal.simek at xilinx.com> napsal:
>
> Some structures/functions have been renamed which are not reflected in this
> driver.
> Commit 8a8d24bdf174 ("dm: treewide: Rename ..._platdata variables to just
> ..._plat"), commit c69cda25c9b5 ("dm: treewide: Rename dev_get_platdata()
> to dev_get_plat()"), commit caa4daa2ae3d ("dm: treewide: Rename 'platdata'
> variables to just 'plat'") and commit 41575d8e4c33 ("dm: treewide: Rename
> auto_alloc_size members to be shorter") are describing these changes.
>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
> Driver was developed based on master branch and next got more changes.
> ---
> drivers/video/seps525.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/video/seps525.c b/drivers/video/seps525.c
> index 369e5e6afc87..74c8721e1e11 100644
> --- a/drivers/video/seps525.c
> +++ b/drivers/video/seps525.c
> @@ -299,7 +299,7 @@ static int seps525_probe(struct udevice *dev)
>
> static int seps525_bind(struct udevice *dev)
> {
> - struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
> + struct video_uc_plat *plat = dev_get_uclass_plat(dev);
>
> plat->size = WIDTH * HEIGHT * 16;
>
> @@ -320,8 +320,8 @@ U_BOOT_DRIVER(seps525_video) = {
> .id = UCLASS_VIDEO,
> .of_match = seps525_ids,
> .ops = &seps525_ops,
> - .platdata_auto_alloc_size = sizeof(struct video_uc_platdata),
> + .plat_auto = sizeof(struct video_uc_plat),
> .bind = seps525_bind,
> .probe = seps525_probe,
> - .priv_auto_alloc_size = sizeof(struct seps525_priv),
> + .priv_auto = sizeof(struct seps525_priv),
> };
> --
> 2.30.0
>
This has been fixed by another patch that's why dropping it.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
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