[PATCH u-boot-marvell] ddr: marvell: axp: fix array types have different bounds warning
Stefan Roese
sr at denx.de
Fri Mar 12 09:53:27 CET 2021
On 07.03.21 00:00, Marek Behún wrote:
> The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have
> different bounds declared in header files where these variables are also
> defined from the ones declared in source files.
>
> This causes the compiler to complain (when building with LTO):
> ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match
> original declaration
> [-Wlto-type-mismatch]
> ddr3_patterns_64bit.h:911:5: note: array types have different bounds
> ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously
> declared here
>
> ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match
> original declaration [-Wlto-type-mismatch]
> ddr3_axp_vars.h:167:4: note: array types have different bounds
> ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared
> here
>
> ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match
> original declaration [-Wlto-type-mismatch]
> ddr3_axp_vars.h:196:4: note: array types have different bounds
> ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared
> here
>
> CI managed to trigger this as an error when compiling with LTO for AXP.
>
> Fix this by using values from the header files, which seem to be the
> correct ones.
>
> Signed-off-by: Marek Behún <marek.behun at nic.cz>
Applied to u-boot-marvell/master
Thanks,
Stefan
> ---
> drivers/ddr/marvell/axp/ddr3_dfs.c | 4 ++--
> drivers/ddr/marvell/axp/ddr3_sdram.c | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c
> index b58c0fe01e..2a4596680b 100644
> --- a/drivers/ddr/marvell/axp/ddr3_dfs.c
> +++ b/drivers/ddr/marvell/axp/ddr3_dfs.c
> @@ -42,8 +42,8 @@ extern u8 div_ratio[CLK_VCO][CLK_DDR];
> extern void get_target_freq(u32 freq_mode, u32 *ddr_freq, u32 *hclk_ps);
> #else
> extern u16 odt_dynamic[ODT_OPT][MAX_CS];
> -extern u8 div_ratio1to1[CLK_CPU][CLK_DDR];
> -extern u8 div_ratio2to1[CLK_CPU][CLK_DDR];
> +extern u8 div_ratio1to1[CLK_VCO][CLK_DDR];
> +extern u8 div_ratio2to1[CLK_VCO][CLK_DDR];
> #endif
> extern u16 odt_static[ODT_OPT][MAX_CS];
>
> diff --git a/drivers/ddr/marvell/axp/ddr3_sdram.c b/drivers/ddr/marvell/axp/ddr3_sdram.c
> index 3a266c6de4..0b150b20f3 100644
> --- a/drivers/ddr/marvell/axp/ddr3_sdram.c
> +++ b/drivers/ddr/marvell/axp/ddr3_sdram.c
> @@ -21,7 +21,7 @@ extern u32 pbs_pattern_32b[2][LEN_PBS_PATTERN];
> #if defined(MV88F78X60)
> extern u32 pbs_pattern_64b[2][LEN_PBS_PATTERN];
> #endif
> -extern u32 pbs_dq_mapping[PUP_NUM_64BIT][DQ_NUM];
> +extern u32 pbs_dq_mapping[PUP_NUM_64BIT + 1][DQ_NUM];
>
> #if defined(MV88F78X60) || defined(MV88F672X)
> /* PBS locked dq (per pup) */
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de
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