[EXT] Re: [PATCH v1 02/23] phy: marvell: rename comphy related definitions to COMPHY_XX

Stefan Roese sr at denx.de
Wed Mar 24 16:39:22 CET 2021


On 24.03.21 16:04, Kostya Porotchkin wrote:
> Hi, Pali,
> 
>> -----Original Message-----
>> From: Pali Rohár <pali at kernel.org>
>> Sent: Wednesday, March 24, 2021 16:43
>> To: Stefan Roese <sr at denx.de>
>> Cc: u-boot at lists.denx.de; Nadav Haklai <nadavh at marvell.com>; Kostya
>> Porotchkin <kostap at marvell.com>; Marek Behún <marek.behun at nic.cz>;
>> Grzegorz Jaszczyk <jaz at semihalf.com>; Igal Liberman <igall at marvell.com>;
>> Baruch Siach <baruch at tkos.co.il>
>> Subject: [EXT] Re: [PATCH v1 02/23] phy: marvell: rename comphy related
>> definitions to COMPHY_XX
>>
>> External Email
>>
>> ----------------------------------------------------------------------
>> On Wednesday 24 March 2021 15:06:28 Stefan Roese wrote:
>>> diff --git a/arch/arm/dts/armada-3720-espressobin.dts
>> b/arch/arm/dts/armada-3720-espressobin.dts
>>> index 96a4b3d95b88..3cea5218d2b3 100644
>>> --- a/arch/arm/dts/armada-3720-espressobin.dts
>>> +++ b/arch/arm/dts/armada-3720-espressobin.dts
>>> @@ -83,18 +83,18 @@
>>>   &comphy {
>>>   	max-lanes = <3>;
>>>   	phy0 {
>>> -		phy-type = <PHY_TYPE_USB3_HOST0>;
>>> -		phy-speed = <PHY_SPEED_5G>;
>>> +		phy-type = <COMPHY_TYPE_PEX0>;
>>> +		phy-speed = <COMPHY_SPEED_2_5G>;
>>
>> Why you are changing type USB to type PCIe? Possible typo?
> [KP] This patch is older that the one that fixed A3720 SERDES assignment.
> So you are right, this change is wrong today and I missed it.
> 
> Stefan, we should either take into account the below patch, or fix this one.

Sure. I'll either fix this in v2 and add some follow-up patch to
fix this.

Pali, thanks for spotting this.

Thanks,
Stefan

> commit 9869490d13d8b47b3464e1de04bb82b7a3f39fd0
> Author: Ken Ma <make at marvell.com>
> Date:   Fri May 12 10:55:56 2017 +0800
> 
>      arm64: dts: a37xx: update comphy lane numbers
>      
>      The latest change in the comphy_a3700.c driver aligned
>      the lanes assignment to the functional specification.
>      Reflect that in supported device trees.
>      
>      Change-Id: Id7a239bd00e35e66b4e5023db081bb417267b8ca
>      Signed-off-by: Ken Ma <make at marvell.com>
> 
> diff --git a/arch/arm/dts/armada-3720-db.dts b/arch/arm/dts/armada-3720-db.dts
> index 169828cbc4..8ee3bdf533 100644
> --- a/arch/arm/dts/armada-3720-db.dts
> +++ b/arch/arm/dts/armada-3720-db.dts
> @@ -101,13 +101,13 @@
>   
>   &comphy {
>          phy0 {
> -               phy-type = <COMPHY_TYPE_PEX0>;
> -               phy-speed = <COMPHY_SPEED_2_5G>;
> +               phy-type = <COMPHY_TYPE_USB3>;
> +               phy-speed = <COMPHY_SPEED_5G>;
>          };
>   
>          phy1 {
> -               phy-type = <COMPHY_TYPE_USB3>;
> -               phy-speed = <COMPHY_SPEED_5G>;
> +               phy-type = <COMPHY_TYPE_PEX0>;
> +               phy-speed = <COMPHY_SPEED_2_5G>;
>          };
>   
>          phy2 {
> diff --git a/arch/arm/dts/armada-3720-espressobin.dts b/arch/arm/dts/armada-3720-espressobin.dts
> index f8fd4ed244..94cab2f4d1 100644
> --- a/arch/arm/dts/armada-3720-espressobin.dts
> +++ b/arch/arm/dts/armada-3720-espressobin.dts
> @@ -72,13 +72,13 @@
>   &comphy {
>          max-lanes = <3>;
>          phy0 {
> -               phy-type = <COMPHY_TYPE_PEX0>;
> -               phy-speed = <COMPHY_SPEED_2_5G>;
> +               phy-type = <COMPHY_TYPE_USB3>;
> +               phy-speed = <COMPHY_SPEED_5G>;
>          };
>   
>          phy1 {
> -               phy-type = <COMPHY_TYPE_USB3>;
> -               phy-speed = <COMPHY_SPEED_5G>;
> +               phy-type = <COMPHY_TYPE_PEX0>;
> +               phy-speed = <COMPHY_SPEED_2_5G>;
>          };
>   
>          phy2 {
> 
>>
>>>   	};
>>>
>>>   	phy1 {
>>> -		phy-type = <PHY_TYPE_PEX0>;
>>> -		phy-speed = <PHY_SPEED_2_5G>;
>>> +		phy-type = <COMPHY_TYPE_USB3_HOST0>;
>>> +		phy-speed = <COMPHY_SPEED_5G>;
>>
>> Same here. PCIe is changed to USB.
> [KP] Yes, need to be fixed, thanks, Pali.
> 
> Regards
> Kosta
>>
>>>   	};
>>>
>>>   	phy2 {
>>> -		phy-type = <PHY_TYPE_SATA0>;
>>> -		phy-speed = <PHY_SPEED_5G>;
>>> +		phy-type = <COMPHY_TYPE_SATA0>;
>>> +		phy-speed = <COMPHY_SPEED_5G>;
>>>   	};
>>>   };


Viele Grüße,
Stefan

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