[EXT] Re: [PATCH v1 2/5] net: phy: marvell: extend 88E2110 to use both 2.5GHz modes

Marek Behun marek.behun at nic.cz
Wed Mar 24 23:45:50 CET 2021


On Wed, 24 Mar 2021 16:36:10 +0000
Stefan Chulski <stefanc at marvell.com> wrote:

> > > > > > SGMII uses the same coding as 1000base-x, but the latter works
> > > > > > only with one speed (1000mbps), while the former can also work
> > > > > > in 10mbps and 100mbps (by repeating each byte 100 or 10 times,  
> > respectively).  
> > > > > >
> > > > > > Then there is 2500base-x, which is the same as 1000base-x, but
> > > > > > with the clock being at 2.5x the speed of 1000base-x clock.
> > > > > >
> > > > > > But there is no analogue of the SGMII protocol (i.e. the
> > > > > > repearing of bytes in order to achieve lower speed) for the 2500base-  
> > x.  
> > > > > >
> > > > > > So what I am confused about here is what is supposed to be the
> > > > > > difference between
> > > > > >   PHY_INTERFACE_MODE_SGMII_2500
> > > > > > and
> > > > > >   PHY_INTERFACE_MODE_2500BASEX
> > > > > > ?
> > > > > >
> > > > > > Marek  
> > > >
> > > > I not sure what is correct naming for these mode. PHY_INTERFACE
> > > > includes both MAC2PHY interfaces(MII, RGMII and etc), PHY2PHY
> > > > interfaces(like
> > > > BASEX) and SGMII(which is kind of both).
> > > > For both 2500BASEX and SGMII_2500 Serdes lanes set to HS-SGMII in
> > > > 3.125G speed, but MAC configured differently and autoneg cannot be  
> > supported.  
> > > >
> > > > Regards,
> > > > Stefan.  
> > >
> > > Since we already has PHY_INTERFACE_MODE_SGMII and
> > > PHY_INTERFACE_MODE_QSGMII (5G mode), maybe we should call  
> > PHY_INTERFACE_MODE_HSGMII - High-Serial Gigabit Media Independent
> > Interface (HSGMII, 3.125Gbps).
> > 
> > And we have now autonegotiation in this discussion. Just today I sent a
> > question to Marvell about 2500base-x and why inband autonegotiation is not
> > supported there, while it is for 1000base-x.  
> 
> To clear thing out, inband autonegotiation is negotiation of pause, speed and duplex over PCS(usually between MAC and PHY).
> 
> > So are you saying that 2500base-x mode is like 1000base-x, but at 2.5g speed,
> > and without inband autonegotiation?  
> 
> From Serdes configurations point of view - lanes configured to 3_125G in 2500base-x and to 1_25G in 1000base-x. 
> MAC doesn't support inband autonegotiation in base-x mode.

Hi Stefan,

This is where you are wrong. MAC _does_ support inband autonegotiation
in base-x mode, specifically in 1000base-x mode (on the SerDes
connection between MAC and PHY). This is supported by Linux' mvneta
driver and also by 

Even Marvell's documentation for various PHYs says that inband
autonegotiation is supported for 1000base-x mode.

Look for example at document MV-S111371-00 Rev E
Marvell Alaska M 88E2181/88E2180/88E2111/88E2110
section 1.3.3 "H Unit 1000BASE-X/2500BASE-X Register Description"
There is register 4.0x2000 "1000BASE-X/SGMII Control Register"
bit 12 of this register is called "1000BASE-X Auto-Negotiation Enable"

And then look for example at datasheet for 88E2110 (doc MV-S111947-00
Rev A)
section 5.2.2 "2500BASE-X". It says:
  2500BASE-X is identical to 1000GBASE-X operation except at
  2.5 times speed. Auto-Negotiation is not supported in 2500BASE-X.

Then look at section 5.2.3.2, which says
  SGMII uses 1000BASE-X coding to send data as well as Auto-Negotiation
  information between the PHY and the MAC. However, the contents of the
  SGMII Auto-Negotiation are different than the 1000BASE-X Auto-Negotiation.

So clearly there is AN for 1000base-x, but not for 2500base-x.

So I think there is still misunderstanding.

I am going to explain to you how I understand the whole thing.
Note that all this time we are talking about auto-negotiation on the
link between MAC and PHY (i.e. how mvneta driver connects to a PHY, for
example).
- 1000base-x PCS is a SerDes protocol using 8b/10b encoding, and is
  capable of auto-negotiation. It allows to auto-negotiate flow-control
  (Pauses) and duplexicity (but is always full-duplex)
- sgmii extends this AN to also support speed autonegotiation
- you do not need to configure AN in SerDes code - no such thing is
  done by the comphy driver, only by the MAC driver for the MAC and PHY
  drivers for the PHY
- MAC can negotiate pause with the PHY in 1000base-x mode (mvneta
  ethernet driver + marvell10g PHY driver in kernel could do this, for
  example)
- 2500base-x PCS is the same as 1000base-x, i.e. a SerDes protocol
  using 8b/10b encoding, via which you can again connect a MAC with a
  PHY, or a PHY with another PHY, or even a MAC with another MAC.
  It's only difference from 1000base-x should be clock speed: it runs
  at 2.5x the speed of 1000base-x

  But for some reason, Marvell documentation for various PHYs says that
  AN is _NOT_ supported in this mode (although it is in 1000base-x).

  Reality is that Marvell's Armada 3720 MAC (mvneta driver) can enable
  AN in 2500base-x mode, and SerDes PHY in the Marvell 88E6141 Switch
  (Topaz) can also enable AN in 2500base-x mode, and they will link
  correctly, and the registers will look as though AN is supported. But
  for some reason the PHY documentation says that AN is NOT supported
  on the PHY for this mode.
  The same for Marvell's Peridot switch (88E6190).
  But it seems that in Amethyst (88E6393X) the AN registers are
  unavailable (always 0xffff) when in 2500base-x mode.
- there is no official specification for 2500base-x mode

> PHY side still can negotiate pause. 
> 
> So: Host side doesn't support inband autoneg(speed/duplex) and speed/duplex fixed. Line side can support autoneg of pause.
> 
> > And meanwhile HS-SGMII mode is like SGMII, but at 2.5g speed, and _WITH_
> > autonegotiation? And what does this autonegotiation support?  
> 
> SGMII has inband negotiation of speed and duplex(1000/100/10 - full/half), but since serdes reconfiguration required to switch between HS-SGMII and SGMII.
> inband negotiation between 2.5C and 1G not supported.
> 
> So for example if you have:
> 
> MAC/Serdes set to 2.5G <-> PHY that support negotiation of link and negotiated 1G speed with link partner. Packet processor driver should reconfigure Serdes Lanes speed.

I think that I am starting to understand where is the misunderstanding.
When I am talking about 1000base-x autonegotiation, I am talking about
autonegotiation between two SerDes peers (this can be MAC-PHY, or
MAC-MAC via a SFP module, for example).

> > Does is support only negotiation of Pause? Or does it support negotiation of link 
> > duplexicity and speed as well?  
> 
> In HS-SGMII there no much options speed always 2500 and duplex full, only pause taken from PCS inband Auto-Negotiation.
> For SGMII pause, duplexicity and speed negotiation supported. 

So you are saying that HS-SGMII does support Pause autonegotiation? But
that is contrary to what I wrote above, that Marvell's documentation
says that AN is not supported in 2500base-x mode.

This means that you are saying that 2500base-x is different mode from
HS-SGMII on the SerDes?

Because you are using PHY_INTERFACE_MODE_SGMII_2500 additionaly to
PHY_INTERFACE_MODE_2500BASEX. Note that Linux only defines the latter,
not the former. This is because there is NO SGMII supported over 2.5g
SerDes.

You have
  1000base-x supporting AN of Pause (and Duplex, but always full)
  sgmii      supporting AN of Pause and Speed and Duplex

And then if you multiply the clock 2.5x, you should theoretically have
  2500base-x supporting AN of Pause (and Duplex, but always full)

But you are acting as if there was
  2500base-x NOT supporting AN
  hs-sgmii   supporting AN of Pause

which is completely bonkers.

Could you please ask internally at Marvell?
We are trying to get to the bottom of this because we are stuck in
development of code for Amethyst. We need to get 2500base-x to work,
we need to know whether it does or does not support AN, or maybe does
but only for some devices. Otherwise it may happen that some SFPs
won't link with our hardware.

Thank you.

Marek


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