[PATCH] spi: xilinx_spi: Trivial fixes in axi qspi driver

[Michal Simek]

st 17. 3. 2021 v 9:17 odesílatel Michal Simek <michal.simek at xilinx.com> napsal:
>
> From: T Karthik Reddy <t.karthik.reddy at xilinx.com>
>
> Use __func__ instead for function name in debug.
> Use Linux style u32 instead of uint32_t.
>
> Signed-off-by: T Karthik Reddy <t.karthik.reddy at xilinx.com>
> Acked-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
>  drivers/spi/xilinx_spi.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
> index 0274afdc6e0d..b892cdae9bab 100644
> --- a/drivers/spi/xilinx_spi.c
> +++ b/drivers/spi/xilinx_spi.c
> @@ -314,8 +314,7 @@ static int xilinx_spi_set_speed(struct udevice *bus, uint speed)
>
>         priv->freq = speed;
>
> -       debug("xilinx_spi_set_speed: regs=%p, speed=%d\n", priv->regs,
> -             priv->freq);
> +       debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq);
>
>         return 0;
>  }
> @@ -324,7 +323,7 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode)
>  {
>         struct xilinx_spi_priv *priv = dev_get_priv(bus);
>         struct xilinx_spi_regs *regs = priv->regs;
> -       uint32_t spicr;
> +       u32 spicr;
>
>         spicr = readl(&regs->spicr);
>         if (mode & SPI_LSB_FIRST)
> @@ -339,8 +338,7 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode)
>         writel(spicr, &regs->spicr);
>         priv->mode = mode;
>
> -       debug("xilinx_spi_set_mode: regs=%p, mode=%d\n", priv->regs,
> -             priv->mode);
> +       debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
>
>         return 0;
>  }
> --
> 2.30.1
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs