[PATCH v3 18/20] configs: j7200_evm_a72_defconfig: Add config for torrent serdes and common clock framework
Kishon Vijay Abraham I
kishon at ti.com
Tue May 4 12:41:53 CEST 2021
From: Aswath Govindraju <a-govindraju at ti.com>
Add config for torrent serdes and common clock framework.
Signed-off-by: Aswath Govindraju <a-govindraju at ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon at ti.com>
---
configs/j7200_evm_a72_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 162bcc8753..bf78b36d22 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -96,6 +96,7 @@ CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
+CONFIG_CLK_CCF=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
@@ -138,9 +139,15 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
+CONFIG_MULTIPLEXER=y
+CONFIG_MUX_MMIO=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PHY=y
+CONFIG_SPL_PHY=y
+CONFIG_PHY_CADENCE_TORRENT=y
+CONFIG_PHY_J721E_WIZ=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
--
2.17.1
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