[PATCH 0/9] riscv: Partially move to binman to generate u-boot.itb

[Bin Meng]

Hi Simon,

On Thu, May 6, 2021 at 7:37 AM Simon Glass <sjg at chromium.org> wrote:
>
> Hi Bin,
>
> On Wed, 5 May 2021 at 08:16, Bin Meng <bmeng.cn at gmail.com> wrote:
> >
> > This series updates binman to handle creation of u-boot.itb image for
> > RISC-V SiFive Unleashed board.
> >
> > QEMU RISC-V remains unchanged, as binman uses a dtb to describe the
> > image format, but for QEMU RISC-V there is no dtb as dtb is passed
> > to U-Boot via CONFIG_OF_PRIOR_STAGE.
>
> That's odd. What software is providing the DTB? Not SPL?

QEMU itself creates DTB on the fly, based on command parameters passed
to QEMU. The DTB address will be passed to U-Boot by QEMU.

> >
> > Not sure how such use case could be properly supported by binman?
>
> Perhaps by adding a .dts file in U-Boot, or making it available
> manually in some hacky way.

I will see if I can do some hacky way :( Not sure if it brings any
improvements compared to current CONFIG_SPL_FIT_GENERATOR scripts.

Regards,
Bin