[PATCH 02/10] arm64: zynqmp: Add 'silabs, skip-recall' to DDR DIMM si570 clk node
Michal Simek
michal.simek at xilinx.com
Mon May 10 16:17:41 CEST 2021
From: Saeed Nowshadi <saeed.nowshadi at xilinx.com>
The 'silabs,skip-recall' property prevents interruption in operation of
the clock while the driver is being probed. Without this property, the
DDR DIMM clk can cause a failure during Versal's boot.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi at xilinx.com>
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---
arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index 135c83f502e8..e5d75e552346 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx Versal a2197 RevA System Controller
*
- * (C) Copyright 2019 - 2020, Xilinx, Inc.
+ * (C) Copyright 2019 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
@@ -505,6 +505,7 @@
factory-fout = <200000000>;
clock-frequency = <200000000>;
clock-output-names = "si570_ddrdimm1_clk";
+ silabs,skip-recall;
};
};
i2c at 4 { /* LPDDR4_SI570_CLK2 */
--
2.31.1
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