[PATCH] mvebu: x530: Reduce SPL image size

Chris Packham judge.packham at gmail.com
Wed May 12 23:20:43 CEST 2021


On Wed, May 12, 2021 at 8:06 PM Stefan Roese <sr at denx.de> wrote:
>
> On 12.05.21 09:59, Chris Packham wrote:
> > On Wed, May 12, 2021 at 7:18 PM Stefan Roese <sr at denx.de> wrote:
> >>
> >> Currently, building U-Boot for x530 fails since the SPL image is too
> >> big.
> >
> > Currently? It's working for me on master. Are there upcoming mvebu
> > changes that push us over the limit?
>
> Yes, I'm working on a pull request right now. Some enhancements to the
> SPI driver are most likely responsible for the code increase.
>
> >> This patch reduces the SPL size by changing the following Kconfig
> >> options:
> >>
> >> Enable CONFIG_SPL_TINY_MEMSET
> >> Disable CONFIG_SPI_FLASH_BAR
> >>
> >> By disabling CONFIG_SPI_FLASH_BAR, the tiny SPI NOR framework can be
> >> used.
> >
> > I've got a nagging feeling I needed CONFIG_SPI_FLASH_BAR for some
> > reason. Possibly for some alternate part we were looking at, on the
> > other hand it could also be from the db88f6820-amc board which I based
> > the initial defconfig on.
> >
> > Looking at what CONFIG_SPI_FLASH_BAR does I think we should be safe.
> > We only fit 16MiB parts and aren't likely to start fitting bigger
> > parts unless all the spi-nor vendors decide to stop making ones
> > <16MiB.
>
> Please note that there are better ways to handle the > 16MiB SPI
> NOR issue. E.g. by using 3 vs 4 byte commands and Serial Flash
> Discoverable Parameters (SFDP) parsing, which is supported in
> U-Boot since quite some time. I did not use CONFIG_SPI_FLASH_BAR
> for a longer time now IIRC.
>

I think (but am not sure) that the 4 byte command mode upsets the
bootrom when booting from spi flash. On and off I've hit a problem on
the db-88f6820-amc which does have a 32MiB flash fitted where the
bootrom can't fetch the first boot stage on reboot after booting linux
(for some kernel versions). Power cycling resolves the problem. I
think this might be because the bootrom only speaks the 3 byte
protocol and once the chip is put into 4 byte mode the bootrom lacks
the ability to change back. None of this affects the x530 so there is
no problem with this change. I'm just putting this out there for
future mailing list readers.

> >>
> >> Signed-off-by: Stefan Roese <sr at denx.de>
> >> Cc: Chris Packham <chris.packham at alliedtelesis.co.nz>
> >> Cc: Pratyush Yadav <p.yadav at ti.com>
> >> Cc: Tom Rini <trini at konsulko.com>
> >
> > Tested-by: Chris Packham <chris.packham at alliedtelesis.co.nz>
> >
> > (yes I'm mixing work and personal email addresses. I can re-send
> > tomorrow from the office if that's a concern).
>
> This is okay for me.
>
> Thanks for the quick review and test.
>
> Thanks,
> Stefan
>
> >> ---
> >>   configs/x530_defconfig | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/configs/x530_defconfig b/configs/x530_defconfig
> >> index 890c94b5c1fe..76574c4de4be 100644
> >> --- a/configs/x530_defconfig
> >> +++ b/configs/x530_defconfig
> >> @@ -62,7 +62,6 @@ CONFIG_SYS_NAND_USE_FLASH_BBT=y
> >>   CONFIG_NAND_PXA3XX=y
> >>   CONFIG_SF_DEFAULT_BUS=1
> >>   CONFIG_SF_DEFAULT_SPEED=50000000
> >> -CONFIG_SPI_FLASH_BAR=y
> >>   CONFIG_SPI_FLASH_MACRONIX=y
> >>   CONFIG_SPI_FLASH_STMICRO=y
> >>   CONFIG_SPI_FLASH_SST=y
> >> @@ -84,3 +83,4 @@ CONFIG_USB_ETHER_ASIX=y
> >>   CONFIG_USB_ETHER_ASIX88179=y
> >>   CONFIG_WDT=y
> >>   CONFIG_WDT_ORION=y
> >> +CONFIG_SPL_TINY_MEMSET=y
> >> --
> >> 2.31.1
> >>
>
>
> Viele Grüße,
> Stefan
>
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de


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