[PATCH v2 6/7] arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB

[Stefan Roese]

On 26.05.21 17:59, Pali Rohár wrote:
> For some configurations with more PCIe cards and PCIe bridges, 16 MiB of
> PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB
> CPU window for PCIe, and since IO port space is only 64 KiB in total,
> use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for
> PCIe MEM.
> 
> Signed-off-by: Pali Rohár <pali at kernel.org>
> Reviewed-by: Marek Behún <marek.behun at nic.cz>

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

> ---
> Changes in v2:
> * Fix size for PCIe MEM
> ---
>   arch/arm/dts/armada-37xx.dtsi | 13 ++++++++++---
>   1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi
> index b7d325b40577..2615b8c748c1 100644
> --- a/arch/arm/dts/armada-37xx.dtsi
> +++ b/arch/arm/dts/armada-37xx.dtsi
> @@ -332,10 +332,17 @@
>   			status = "disabled";
>   
>   			bus-range = <0 0xff>;
> +			/*
> +			 * The 128 MiB address range [0xe8000000-0xf0000000] is
> +			 * dedicated for PCIe and can be assigned to 8 windows
> +			 * with size a power of two. Use one 64 KiB window for
> +			 * IO at the end and the remaining seven windows
> +			 * (totaling 127 MiB) for MEM.
> +			 */
>   			ranges = <0x82000000 0 0xe8000000
> -				 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
> -				 0x81000000 0 0xe9000000
> -				 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
> +				 0 0xe8000000 0 0x7f00000 /* Port 0 MEM */
> +				 0x81000000 0 0xefff0000
> +				 0 0xefff0000 0 0x10000>; /* Port 0 IO*/
>   		};
>   	};
>   };
> 


Viele Grüße,
Stefan

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