[PATCH 7/7] arm64: zynqmp: Update Copyright years to 2021
Michal Simek
michal.simek at xilinx.com
Mon May 31 10:00:06 CEST 2021
Trivial change for all files I have touched recently.
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---
arch/arm/dts/zynqmp-zc1232-revA.dts | 2 +-
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 2 +-
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 2 +-
arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 2 +-
arch/arm/dts/zynqmp-zcu100-revC.dts | 2 +-
arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +-
arch/arm/dts/zynqmp-zcu104-revA.dts | 2 +-
arch/arm/dts/zynqmp-zcu104-revC.dts | 2 +-
arch/arm/dts/zynqmp-zcu106-revA.dts | 2 +-
arch/arm/dts/zynqmp-zcu111-revA.dts | 2 +-
arch/arm/dts/zynqmp-zcu1275-revA.dts | 2 +-
arch/arm/dts/zynqmp-zcu1275-revB.dts | 2 +-
arch/arm/dts/zynqmp-zcu1285-revA.dts | 2 +-
arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +-
arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +-
arch/arm/dts/zynqmp.dtsi | 2 +-
16 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts
index ef7cf0a36b21..65dd4e1f3a5d 100644
--- a/arch/arm/dts/zynqmp-zc1232-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1232-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZC1232
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index 039a8da1a960..0c6a2a92dfe5 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm015-dc1
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index d6e924803354..1a8cfdeb7f45 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm016-dc2
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
index 46b27a000949..41ab20c3895f 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm019-dc5
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu at xilinx.com>
* Michal Simek <michal.simek at xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 3be69ad9bce4..cad1a23e9539 100644
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU100 revC
*
- * (C) Copyright 2016 - 2020, Xilinx, Inc.
+ * (C) Copyright 2016 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
* Nathalie Chan King Choy
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index ec61b7089da2..7190e876d8dd 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU102 RevA
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index c25ac9af48e8..76c635f0d460 100644
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index ce9d8fb3b815..f9eb4caaf8c0 100644
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index 2fd41ad2d523..4da7a3edf548 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU106
*
- * (C) Copyright 2016 - 2020, Xilinx, Inc.
+ * (C) Copyright 2016 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index 10bb45b49f1a..85821065dd43 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU111
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts
index b9a9d9802d93..10d8bc8f9a19 100644
--- a/arch/arm/dts/zynqmp-zcu1275-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1275
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
* Siva Durga Prasad Paladugu <sivadur at xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts
index f14707419b40..97ae1b2d2d71 100644
--- a/arch/arm/dts/zynqmp-zcu1275-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1275 RevB
*
- * (C) Copyright 2018 - 2020, Xilinx, Inc.
+ * (C) Copyright 2018 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
* Siva Durga Prasad Paladugu <sivadur at xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts
index 42a73ea31aec..eaf99a9fa82d 100644
--- a/arch/arm/dts/zynqmp-zcu1285-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1285 RevA
*
- * (C) Copyright 2018 - 2020, Xilinx, Inc.
+ * (C) Copyright 2018 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
* Siva Durga Prasad Paladugu <sivadur at xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index 496e8d1de22b..03c84ae21acb 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU208
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index 3a205c089444..fd1d9bfbd199 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU216
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index deb3fa3ab3f3..47ffdf1b1650 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP
*
- * (C) Copyright 2014 - 2020, Xilinx, Inc.
+ * (C) Copyright 2014 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek at xilinx.com>
*
--
2.31.1
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