[PATCH v2 1/4] fpga: add option for loading FPGA secure bitstreams

[Michal Simek]

On 11/1/21 11:47, Oleksandr Suvorov wrote:
> It allows using this feature without enabling the "fpga loads"
> command.
> 
> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov at foundries.io>
> ---
> 
> (no changes since v1)
> 
>   cmd/Kconfig             |  3 ++-
>   drivers/fpga/Kconfig    | 14 ++++++++++++++
>   drivers/fpga/fpga.c     |  2 +-
>   drivers/fpga/xilinx.c   |  2 +-
>   drivers/fpga/zynqmppl.c |  4 ++--
>   5 files changed, 20 insertions(+), 5 deletions(-)
> 
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index 5b30b13e43..270d1765d3 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -949,8 +949,9 @@ config CMD_FPGA_LOADP
>   	  a partial bitstream.
>   
>   config CMD_FPGA_LOAD_SECURE
> -	bool "fpga loads - loads secure bitstreams (Xilinx only)"
> +	bool "fpga loads - loads secure bitstreams"
>   	depends on CMD_FPGA
> +	select FPGA_LOAD_SECURE
>   	help
>   	  Enables the fpga loads command which is used to load secure
>   	  (authenticated or encrypted or both) bitstreams on to FPGA.
> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
> index dc0b3dd31b..262f95a252 100644
> --- a/drivers/fpga/Kconfig
> +++ b/drivers/fpga/Kconfig
> @@ -85,4 +85,18 @@ config FPGA_ZYNQPL
>   	  Enable FPGA driver for loading bitstream in BIT and BIN format
>   	  on Xilinx Zynq devices.
>   
> +config FPGA_LOAD_SECURE
> +	bool "Enable loading secure bitstreams"
> +	depends on FPGA
> +	help
> +	  Enables the fpga loads() functions that are used to load secure
> +	  (authenticated or encrypted or both) bitstreams on to FPGA.
> +
> +config SPL_FPGA_LOAD_SECURE
> +	bool "Enable loading secure bitstreams for SPL"
> +	depends on FPGA
> +	help
> +	  Enables the fpga loads() functions that are used to load secure
> +	  (authenticated or encrypted or both) bitstreams on to FPGA.
> +
>   endmenu
> diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
> index fe3dfa1233..3b0a44b242 100644
> --- a/drivers/fpga/fpga.c
> +++ b/drivers/fpga/fpga.c
> @@ -220,7 +220,7 @@ int fpga_fsload(int devnum, const void *buf, size_t size,
>   }
>   #endif
>   
> -#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
> +#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
>   int fpga_loads(int devnum, const void *buf, size_t size,
>   	       struct fpga_secure_info *fpga_sec_info)
>   {
> diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
> index cbebefb55f..6bc1bc491f 100644
> --- a/drivers/fpga/xilinx.c
> +++ b/drivers/fpga/xilinx.c
> @@ -172,7 +172,7 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
>   }
>   #endif
>   
> -#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
> +#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
>   int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
>   		 struct fpga_secure_info *fpga_sec_info)
>   {
> diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
> index 6b394869db..8ff12bf50a 100644
> --- a/drivers/fpga/zynqmppl.c
> +++ b/drivers/fpga/zynqmppl.c
> @@ -245,7 +245,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
>   	return ret;
>   }
>   
> -#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
> +#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
>   static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
>   			struct fpga_secure_info *fpga_sec_info)
>   {
> @@ -306,7 +306,7 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
>   
>   struct xilinx_fpga_op zynqmp_op = {
>   	.load = zynqmp_load,
> -#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
> +#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
>   	.loads = zynqmp_loads,
>   #endif
>   	.info = zynqmp_pcap_info,
> 

Acked-by: Michal Simek <michal.simek at xilinx.com>

Thanks,
Michal