[PATCH v4 03/16] i.MX8M: crypto: updated device tree for supporting DM in SPL

Adam Ford aford173 at gmail.com
Mon Nov 1 14:00:04 CET 2021


On Tue, Oct 26, 2021 at 1:57 AM Gaurav Jain <gaurav.jain at nxp.com> wrote:
>
> disabled use of JR0 in SPL and uboot, as JR0 is reserved
> for secure boot.
>
> Signed-off-by: Gaurav Jain <gaurav.jain at nxp.com>
> Reviewed-by: Ye Li <ye.li at nxp.com>
> ---
>  arch/arm/dts/imx8mm-evk-u-boot.dtsi      | 18 +++++++++++++++++-
>  arch/arm/dts/imx8mm.dtsi                 |  1 +
>  arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 18 +++++++++++++++++-
>  arch/arm/dts/imx8mn.dtsi                 |  1 +
>  arch/arm/dts/imx8mp-evk-u-boot.dtsi      | 18 +++++++++++++++++-
>  arch/arm/dts/imx8mp.dtsi                 |  1 +
>  arch/arm/dts/imx8mq.dtsi                 |  1 +
>  7 files changed, 55 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> index 3c75415e8f..40f5cfda9a 100644
> --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> @@ -1,6 +1,6 @@
>  // SPDX-License-Identifier: GPL-2.0+
>  /*
> - * Copyright 2019 NXP
> + * Copyright 2019, 2021 NXP
>   */
>
>  #include "imx8mm-u-boot.dtsi"
> @@ -72,6 +72,22 @@
>         u-boot,dm-spl;
>  };
>
> +&crypto {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr0 {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr1 {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr2 {
> +       u-boot,dm-spl;
> +};
> +
>  &usdhc1 {
>         u-boot,dm-spl;
>  };
> diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi
> index b142b80734..009999bf3a 100644
> --- a/arch/arm/dts/imx8mm.dtsi
> +++ b/arch/arm/dts/imx8mm.dtsi
> @@ -824,6 +824,7 @@
>                                         compatible = "fsl,sec-v4.0-job-ring";
>                                         reg = <0x1000 0x1000>;
>                                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> +                                       status = "disabled";

Changing the SoC DTSI files makes future re-synchronizing difficult.
If you mark these as disabled in the respective u-boot.dtsi files, it
will create less work in the future.  You're already enabling a bunch
of new features in the respective -u-boot.dtsi files, I would suggest
doing the disable in the same way.

>                                 };
>
>                                 sec_jr1: jr at 2000 {
> diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> index 1d3844437d..b462d24eb2 100644
> --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> @@ -1,6 +1,6 @@
>  // SPDX-License-Identifier: GPL-2.0+
>  /*
> - * Copyright 2019 NXP
> + * Copyright 2019, 2021 NXP
>   */
>
>  / {
> @@ -104,6 +104,22 @@
>         u-boot,dm-spl;
>  };
>
> +&crypto {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr0 {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr1 {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr2 {
> +       u-boot,dm-spl;
> +};
> +
>  &usdhc1 {
>         u-boot,dm-spl;
>  };
> diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi
> index edcb415b53..1820a5af37 100644
> --- a/arch/arm/dts/imx8mn.dtsi
> +++ b/arch/arm/dts/imx8mn.dtsi
> @@ -822,6 +822,7 @@
>                                          compatible = "fsl,sec-v4.0-job-ring";
>                                          reg = <0x1000 0x1000>;
>                                          interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> +                                        status = "disabled";

ditto

>                                 };
>
>                                 sec_jr1: jr at 2000 {
> diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> index ab849ebaac..52f473dc52 100644
> --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> @@ -1,6 +1,6 @@
>  // SPDX-License-Identifier: GPL-2.0+
>  /*
> - * Copyright 2019 NXP
> + * Copyright 2019, 2021 NXP
>   */
>
>  #include "imx8mp-u-boot.dtsi"
> @@ -67,6 +67,22 @@
>         u-boot,dm-spl;
>  };
>
> +&crypto {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr0 {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr1 {
> +       u-boot,dm-spl;
> +};
> +
> +&sec_jr2 {
> +       u-boot,dm-spl;
> +};
> +
>  &i2c1 {
>         u-boot,dm-spl;
>  };
> diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
> index c2d51a46cb..57b01c3a57 100644
> --- a/arch/arm/dts/imx8mp.dtsi
> +++ b/arch/arm/dts/imx8mp.dtsi
> @@ -624,6 +624,7 @@
>                                         compatible = "fsl,sec-v4.0-job-ring";
>                                         reg = <0x1000 0x1000>;
>                                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> +                                       status = "disabled";
ditto

>                                 };
>
>                                 sec_jr1: jr at 2000 {
> diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
> index a44f729d0e..ecab44ca13 100644
> --- a/arch/arm/dts/imx8mq.dtsi
> +++ b/arch/arm/dts/imx8mq.dtsi
> @@ -955,6 +955,7 @@
>                                         compatible = "fsl,sec-v4.0-job-ring";
>                                         reg = <0x1000 0x1000>;
>                                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> +                                       status = "disabled";
ditto
>                                 };
>
>                                 sec_jr1: jr at 2000 {
> --
> 2.17.1
>


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