[PATCH] pinctrl: Add Apple pinctrl driver
Mark Kettenis
mark.kettenis at xs4all.nl
Tue Nov 2 11:18:49 CET 2021
> From: Mark Kettenis <kettenis at openbsd.org>
> Date: Mon, 1 Nov 2021 22:53:19 +0100
>
> This driver supports both pin muxing and GPIO support for the
> pin control logic found on Apple SoCs.
>
> Signed-off-by: Mark Kettenis <kettenis at openbsd.org>
> ---
> MAINTAINERS | 1 +
> .../pinctrl/apple,pinctrl.yaml | 106 +++++++++
> drivers/pinctrl/Kconfig | 11 +
> drivers/pinctrl/Makefile | 1 +
> drivers/pinctrl/pinctrl-apple.c | 207 ++++++++++++++++++
> 5 files changed, 326 insertions(+)
> create mode 100644 doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml
> create mode 100644 drivers/pinctrl/pinctrl-apple.c
Oops. I forgot the bits that actually enable this driver. Will send
out a v2 later today when I'm fully caffeinated.
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 9d8cba9028..98eb491f60 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -115,6 +115,7 @@ F: arch/arm/include/asm/arch-m1/
> F: arch/arm/mach-apple/
> F: configs/apple_m1_defconfig
> F: drivers/iommu/apple_dart.c
> +F: drivers/pinctrl/pinctrl-apple.c
> F: include/configs/apple.h
>
> ARM
> diff --git a/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml b/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml
> new file mode 100644
> index 0000000000..d50571affd
> --- /dev/null
> +++ b/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml
> @@ -0,0 +1,106 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/apple,pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Apple GPIO controller
> +
> +maintainers:
> + - Mark Kettenis <kettenis at openbsd.org>
> +
> +description: |
> + The Apple GPIO controller is a simple combined pin and GPIO
> + controller present on Apple ARM SoC platforms, including various
> + iPhone and iPad devices and the "Apple Silicon" Macs.
> +
> +properties:
> + compatible:
> + items:
> + - const: apple,t8103-pinctrl
> + - const: apple,pinctrl
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + const: 2
> +
> + gpio-ranges:
> + maxItems: 1
> +
> + interrupts:
> + description: One interrupt for each of the (up to 7) interrupt
> + groups supported by the controller sorted by interrupt group
> + number in ascending order.
> + minItems: 1
> + maxItems: 7
> +
> + interrupt-controller: true
> +
> +patternProperties:
> + '-pins$':
> + type: object
> + $ref: pinmux-node.yaml#
> +
> + properties:
> + pinmux:
> + description:
> + Values are constructed from pin number and alternate function
> + configuration number using the APPLE_PINMUX() helper macro
> + defined in include/dt-bindings/pinctrl/apple.h.
> +
> + required:
> + - pinmux
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - gpio-controller
> + - '#gpio-cells'
> + - gpio-ranges
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/apple-aic.h>
> + #include <dt-bindings/pinctrl/apple.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pinctrl: pinctrl at 23c100000 {
> + compatible = "apple,t8103-pinctrl", "apple,pinctrl";
> + reg = <0x2 0x3c100000 0x0 0x100000>;
> + clocks = <&gpio_clk>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&pinctrl 0 0 212>;
> +
> + interrupt-controller;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 16 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 17 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 18 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 19 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 20 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 21 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 22 IRQ_TYPE_LEVEL_HIGH>;
> +
> + pcie_pins: pcie-pins {
> + pinmux = <APPLE_PINMUX(150, 1)>,
> + <APPLE_PINMUX(151, 1)>,
> + <APPLE_PINMUX(32, 1)>;
> + };
> + };
> + };
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index 30eaa376c8..cac5f2488d 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -145,6 +145,17 @@ config SPL_PINCONF_RECURSIVE
>
> if PINCTRL || SPL_PINCTRL
>
> +config PINCTRL_APPLE
> + bool "Apple pinctrl driver"
> + depends on DM && PINCTRL_GENERIC && ARCH_APPLE
> + default y
> + help
> + Support pin multiplexing on Apple SoCs.
> +
> + The driver is controlled by a device tree node which contains
> + both the GPIO definitions and pin control functions for each
> + available multiplex function.
> +
> config PINCTRL_AR933X
> bool "QCA/Athores ar933x pin control driver"
> depends on DM && SOC_AR933X
> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> index 05b71f2f13..fd736a7f64 100644
> --- a/drivers/pinctrl/Makefile
> +++ b/drivers/pinctrl/Makefile
> @@ -3,6 +3,7 @@
> obj-y += pinctrl-uclass.o
> obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
>
> +obj-$(CONFIG_PINCTRL_APPLE) += pinctrl-apple.o
> obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
> obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
> obj-y += nxp/
> diff --git a/drivers/pinctrl/pinctrl-apple.c b/drivers/pinctrl/pinctrl-apple.c
> new file mode 100644
> index 0000000000..62476358c3
> --- /dev/null
> +++ b/drivers/pinctrl/pinctrl-apple.c
> @@ -0,0 +1,207 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2021 Mark Kettenis <kettenis at openbsd.org>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <dm/device-internal.h>
> +#include <dm/pinctrl.h>
> +#include <dt-bindings/pinctrl/apple.h>
> +#include <asm/io.h>
> +#include <asm-generic/gpio.h>
> +#include <linux/bitfield.h>
> +
> +struct apple_pinctrl_priv {
> + void *base;
> + int pin_count;
> +};
> +
> +#define REG_GPIO(x) (4 * (x))
> +#define REG_GPIO_DATA BIT(0)
> +#define REG_GPIO_MODE GENMASK(3, 1)
> +#define REG_GPIO_OUT 1
> +#define REG_GPIO_PERIPH GENMASK(6, 5)
> +#define REG_GPIO_INPUT_ENABLE BIT(9)
> +
> +static void apple_pinctrl_config_pin(struct apple_pinctrl_priv *priv,
> + unsigned pin, u32 clr, u32 set)
> +{
> + unsigned reg = REG_GPIO(pin);
> + u32 old, new;
> +
> + old = readl(priv->base + REG_GPIO(pin));
> + new = (old & ~clr) | set;
> + writel(new, priv->base + reg);
> +}
> +
> +static int apple_gpio_get_value(struct udevice *dev, unsigned offset)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
> +
> + return !!(readl(priv->base + REG_GPIO(offset)) & REG_GPIO_DATA);
> +}
> +
> +static int apple_gpio_set_value(struct udevice *dev, unsigned offset,
> + int value)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
> +
> + apple_pinctrl_config_pin(priv, offset, REG_GPIO_DATA,
> + value ? REG_GPIO_DATA : 0);
> + return 0;
> +}
> +
> +static int apple_gpio_get_direction(struct udevice *dev, unsigned offset)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
> + u32 reg = readl(priv->base + REG_GPIO(offset));
> +
> + if (FIELD_GET(REG_GPIO_MODE, reg) == REG_GPIO_OUT)
> + return GPIOF_OUTPUT;
> + else
> + return GPIOF_INPUT;
> +}
> +
> +static int apple_gpio_direction_input(struct udevice *dev, unsigned offset)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
> +
> + apple_pinctrl_config_pin(priv, offset,
> + REG_GPIO_PERIPH | REG_GPIO_MODE,
> + REG_GPIO_INPUT_ENABLE);
> + return 0;
> +}
> +
> +static int apple_gpio_direction_output(struct udevice *dev, unsigned offset,
> + int value)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
> + u32 set = (value ? REG_GPIO_DATA : 0);
> +
> + apple_pinctrl_config_pin(priv, offset, REG_GPIO_DATA |
> + REG_GPIO_PERIPH | REG_GPIO_MODE,
> + set | FIELD_PREP(REG_GPIO_MODE, REG_GPIO_OUT));
> + return 0;
> +}
> +
> +static int apple_gpio_probe(struct udevice *dev)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent);
> + struct gpio_dev_priv *uc_priv;
> +
> + uc_priv = dev_get_uclass_priv(dev);
> + uc_priv->bank_name = "gpio";
> + uc_priv->gpio_count = priv->pin_count;
> +
> + return 0;
> +}
> +
> +static struct dm_gpio_ops apple_gpio_ops = {
> + .get_value = apple_gpio_get_value,
> + .set_value = apple_gpio_set_value,
> + .get_function = apple_gpio_get_direction,
> + .direction_input = apple_gpio_direction_input,
> + .direction_output = apple_gpio_direction_output,
> +};
> +
> +static struct driver apple_gpio_driver = {
> + .name = "apple_gpio",
> + .id = UCLASS_GPIO,
> + .probe = apple_gpio_probe,
> + .ops = &apple_gpio_ops,
> +};
> +
> +static int apple_pinctrl_get_pins_count(struct udevice *dev)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev);
> +
> + return priv->pin_count;
> +}
> +
> +static const char *apple_pinctrl_get_pin_name(struct udevice *dev,
> + unsigned selector)
> +{
> + static char pin_name[PINNAME_SIZE];
> +
> + snprintf(pin_name, PINNAME_SIZE, "pin%d", selector);
> + return pin_name;
> +}
> +
> +static int apple_pinctrl_get_pin_muxing(struct udevice *dev, unsigned selector,
> + char *buf, int size)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev);
> +
> + if (readl(priv->base + REG_GPIO(selector)) & REG_GPIO_PERIPH)
> + strncpy(buf, "periph", size);
> + else
> + strncpy(buf, "gpio", size);
> + return 0;
> +}
> +
> +static int apple_pinctrl_pinmux_set(struct udevice *dev, unsigned pin_selector,
> + unsigned func_selector)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev);
> +
> + apple_pinctrl_config_pin(priv, pin_selector,
> + REG_GPIO_DATA | REG_GPIO_MODE,
> + FIELD_PREP(REG_GPIO_PERIPH, func_selector) |
> + REG_GPIO_INPUT_ENABLE);
> + return 0;
> +}
> +
> +static int apple_pinctrl_pinmux_property_set(struct udevice *dev,
> + u32 pinmux_group)
> +{
> + unsigned pin_selector = APPLE_PIN(pinmux_group);
> + unsigned func_selector = APPLE_FUNC(pinmux_group);
> + int ret;
> +
> + ret = apple_pinctrl_pinmux_set(dev, pin_selector, func_selector);
> + return ret ? ret : pin_selector;
> +}
> +
> +static int apple_pinctrl_probe(struct udevice *dev)
> +{
> + struct apple_pinctrl_priv *priv = dev_get_priv(dev);
> + struct ofnode_phandle_args args;
> + struct udevice *child;
> +
> + priv->base = dev_read_addr_ptr(dev);
> + if (!priv->base)
> + return -EINVAL;
> +
> + if (!dev_read_phandle_with_args(dev, "gpio-ranges",
> + NULL, 3, 0, &args))
> + priv->pin_count = args.args[2];
> +
> + device_bind(dev, &apple_gpio_driver, "apple_gpio", NULL,
> + dev_ofnode(dev), &child);
> +
> + return 0;
> +}
> +
> +static struct pinctrl_ops apple_pinctrl_ops = {
> + .set_state = pinctrl_generic_set_state,
> + .get_pins_count = apple_pinctrl_get_pins_count,
> + .get_pin_name = apple_pinctrl_get_pin_name,
> + .pinmux_set = apple_pinctrl_pinmux_set,
> + .pinmux_property_set = apple_pinctrl_pinmux_property_set,
> + .get_pin_muxing = apple_pinctrl_get_pin_muxing,
> +};
> +
> +static const struct udevice_id apple_pinctrl_ids[] = {
> + { .compatible = "apple,pinctrl" },
> + { /* sentinel */ }
> +};
> +
> +U_BOOT_DRIVER(pinctrl_apple) = {
> + .name = "apple_pinctrl",
> + .id = UCLASS_PINCTRL,
> + .of_match = apple_pinctrl_ids,
> + .priv_auto = sizeof(struct apple_pinctrl_priv),
> + .ops = &apple_pinctrl_ops,
> + .probe = apple_pinctrl_probe,
> +};
> --
> 2.33.1
>
>
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