[PATCH 7/8] pci: pci_mvebu: Setup PCI controller to Root Complex mode
Stefan Roese
sr at denx.de
Tue Nov 2 11:50:36 CET 2021
On 22.10.21 16:22, Pali Rohár wrote:
> Root Complex should be the default mode, let's set it explicitly.
>
> Signed-off-by: Pali Rohár <pali at kernel.org>
> Reviewed-by: Marek Behún <marek.behun at nic.cz>
Reviewed-by: Stefan Roese <sr at denx.de>
Thanks,
Stefan
> ---
> drivers/pci/pci_mvebu.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
> index e43fa12d3819..b0c673d8c472 100644
> --- a/drivers/pci/pci_mvebu.c
> +++ b/drivers/pci/pci_mvebu.c
> @@ -62,6 +62,7 @@ DECLARE_GLOBAL_DATA_PTR;
> #define PCIE_MASK_ENABLE_INTS (0xf << 24)
> #define PCIE_CTRL_OFF 0x1a00
> #define PCIE_CTRL_X1_MODE BIT(0)
> +#define PCIE_CTRL_RC_MODE BIT(1)
> #define PCIE_STAT_OFF 0x1a04
> #define PCIE_STAT_BUS (0xff << 8)
> #define PCIE_STAT_DEV (0x1f << 16)
> @@ -373,6 +374,11 @@ static int mvebu_pcie_probe(struct udevice *dev)
> struct pci_controller *hose = dev_get_uclass_priv(ctlr);
> u32 reg;
>
> + /* Setup PCIe controller to Root Complex mode */
> + reg = readl(pcie->base + PCIE_CTRL_OFF);
> + reg |= PCIE_CTRL_RC_MODE;
> + writel(reg, pcie->base + PCIE_CTRL_OFF);
> +
> /*
> * Change Class Code of PCI Bridge device to PCI Bridge (0x600400)
> * because default value is Memory controller (0x508000) which
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de
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